230540e655
This patch fixes the cache stats to use the new request ids. Cache stats also display the requestor names in the vector subnames. Most cache stats now include "nozero" and "nonan" flags to reduce the amount of excessive cache stat dump. Also, simplified incMissCount()/incHitCount() functions.
293 lines
8.6 KiB
C++
293 lines
8.6 KiB
C++
/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Erik Hallnor
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*/
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/** @file
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* Definitions of a simple cache block class.
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*/
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#ifndef __CACHE_BLK_HH__
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#define __CACHE_BLK_HH__
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#include <list>
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#include "base/printable.hh"
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#include "mem/packet.hh"
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#include "mem/request.hh"
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#include "sim/core.hh" // for Tick
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/**
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* Cache block status bit assignments
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*/
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enum CacheBlkStatusBits {
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/** valid, readable */
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BlkValid = 0x01,
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/** write permission */
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BlkWritable = 0x02,
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/** read permission (yes, block can be valid but not readable) */
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BlkReadable = 0x04,
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/** dirty (modified) */
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BlkDirty = 0x08,
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/** block was referenced */
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BlkReferenced = 0x10,
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/** block was a hardware prefetch yet unaccessed*/
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BlkHWPrefetched = 0x20
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};
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/**
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* A Basic Cache block.
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* Contains the tag, status, and a pointer to data.
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*/
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class CacheBlk
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{
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public:
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/** The address space ID of this block. */
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int asid;
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/** Data block tag value. */
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Addr tag;
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/**
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* Contains a copy of the data in this block for easy access. This is used
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* for efficient execution when the data could be actually stored in
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* another format (COW, compressed, sub-blocked, etc). In all cases the
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* data stored here should be kept consistant with the actual data
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* referenced by this block.
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*/
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uint8_t *data;
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/** the number of bytes stored in this block. */
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int size;
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/** block state: OR of CacheBlkStatusBit */
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typedef unsigned State;
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/** The current status of this block. @sa CacheBlockStatusBits */
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State status;
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/** Which curTick() will this block be accessable */
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Tick whenReady;
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/**
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* The set this block belongs to.
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* @todo Move this into subclasses when we fix CacheTags to use them.
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*/
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int set;
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/** whether this block has been touched */
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bool isTouched;
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/** Number of references to this block since it was brought in. */
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int refCount;
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/** holds the source requestor ID for this block. */
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int srcMasterId;
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protected:
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/**
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* Represents that the indicated thread context has a "lock" on
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* the block, in the LL/SC sense.
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*/
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class Lock {
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public:
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int contextId; // locking context
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// check for matching execution context
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bool matchesContext(Request *req)
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{
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return (contextId == req->contextId());
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}
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Lock(Request *req)
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: contextId(req->contextId())
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{
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}
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};
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/** List of thread contexts that have performed a load-locked (LL)
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* on the block since the last store. */
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std::list<Lock> lockList;
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public:
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CacheBlk()
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: asid(-1), tag(0), data(0) ,size(0), status(0), whenReady(0),
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set(-1), isTouched(false), refCount(0),
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srcMasterId(Request::invldMasterId)
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{}
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/**
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* Copy the state of the given block into this one.
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* @param rhs The block to copy.
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* @return a const reference to this block.
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*/
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const CacheBlk& operator=(const CacheBlk& rhs)
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{
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asid = rhs.asid;
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tag = rhs.tag;
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data = rhs.data;
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size = rhs.size;
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status = rhs.status;
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whenReady = rhs.whenReady;
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set = rhs.set;
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refCount = rhs.refCount;
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return *this;
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}
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/**
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* Checks the write permissions of this block.
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* @return True if the block is writable.
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*/
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bool isWritable() const
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{
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const State needed_bits = BlkWritable | BlkValid;
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return (status & needed_bits) == needed_bits;
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}
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/**
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* Checks the read permissions of this block. Note that a block
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* can be valid but not readable if there is an outstanding write
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* upgrade miss.
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* @return True if the block is readable.
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*/
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bool isReadable() const
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{
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const State needed_bits = BlkReadable | BlkValid;
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return (status & needed_bits) == needed_bits;
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}
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/**
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* Checks that a block is valid.
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* @return True if the block is valid.
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*/
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bool isValid() const
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{
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return (status & BlkValid) != 0;
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}
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/**
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* Check to see if a block has been written.
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* @return True if the block is dirty.
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*/
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bool isDirty() const
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{
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return (status & BlkDirty) != 0;
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}
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/**
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* Check if this block has been referenced.
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* @return True if the block has been referenced.
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*/
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bool isReferenced() const
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{
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return (status & BlkReferenced) != 0;
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}
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/**
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* Check if this block was the result of a hardware prefetch, yet to
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* be touched.
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* @return True if the block was a hardware prefetch, unaccesed.
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*/
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bool wasPrefetched() const
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{
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return (status & BlkHWPrefetched) != 0;
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}
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/**
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* Track the fact that a local locked was issued to the block. If
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* multiple LLs get issued from the same context we could have
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* redundant records on the list, but that's OK, as they'll all
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* get blown away at the next store.
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*/
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void trackLoadLocked(PacketPtr pkt)
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{
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assert(pkt->isLLSC());
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lockList.push_front(Lock(pkt->req));
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}
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/**
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* Clear the list of valid load locks. Should be called whenever
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* block is written to or invalidated.
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*/
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void clearLoadLocks() { lockList.clear(); }
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/**
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* Handle interaction of load-locked operations and stores.
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* @return True if write should proceed, false otherwise. Returns
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* false only in the case of a failed store conditional.
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*/
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bool checkWrite(PacketPtr pkt)
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{
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Request *req = pkt->req;
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if (pkt->isLLSC()) {
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// it's a store conditional... have to check for matching
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// load locked.
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bool success = false;
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for (std::list<Lock>::iterator i = lockList.begin();
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i != lockList.end(); ++i)
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{
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if (i->matchesContext(req)) {
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// it's a store conditional, and as far as the memory
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// system can tell, the requesting context's lock is
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// still valid.
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success = true;
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break;
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}
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}
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req->setExtraData(success ? 1 : 0);
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clearLoadLocks();
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return success;
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} else {
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// for *all* stores (conditional or otherwise) we have to
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// clear the list of load-locks as they're all invalid now.
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clearLoadLocks();
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return true;
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}
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}
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};
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/**
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* Simple class to provide virtual print() method on cache blocks
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* without allocating a vtable pointer for every single cache block.
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* Just wrap the CacheBlk object in an instance of this before passing
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* to a function that requires a Printable object.
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*/
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class CacheBlkPrintWrapper : public Printable
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{
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CacheBlk *blk;
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public:
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CacheBlkPrintWrapper(CacheBlk *_blk) : blk(_blk) {}
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virtual ~CacheBlkPrintWrapper() {}
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void print(std::ostream &o, int verbosity = 0,
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const std::string &prefix = "") const;
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};
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#endif //__CACHE_BLK_HH__
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