b913af440b
This patch removes printConfig() functions from all structures in Ruby. Most of the information is already part of config.ini, and where ever it is not, it would become in due course.
192 lines
5.8 KiB
C++
192 lines
5.8 KiB
C++
/*
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* Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __MEM_RUBY_SYSTEM_PERFECTCACHEMEMORY_HH__
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#define __MEM_RUBY_SYSTEM_PERFECTCACHEMEMORY_HH__
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#include "base/hashmap.hh"
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#include "mem/protocol/AccessPermission.hh"
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#include "mem/ruby/common/Address.hh"
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template<class ENTRY>
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struct PerfectCacheLineState
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{
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PerfectCacheLineState() { m_permission = AccessPermission_NUM; }
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AccessPermission m_permission;
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ENTRY m_entry;
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};
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template<class ENTRY>
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inline std::ostream&
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operator<<(std::ostream& out, const PerfectCacheLineState<ENTRY>& obj)
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{
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return out;
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}
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template<class ENTRY>
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class PerfectCacheMemory
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{
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public:
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PerfectCacheMemory();
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// tests to see if an address is present in the cache
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bool isTagPresent(const Address& address) const;
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// Returns true if there is:
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// a) a tag match on this address or there is
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// b) an Invalid line in the same cache "way"
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bool cacheAvail(const Address& address) const;
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// find an Invalid entry and sets the tag appropriate for the address
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void allocate(const Address& address);
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void deallocate(const Address& address);
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// Returns with the physical address of the conflicting cache line
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Address cacheProbe(const Address& newAddress) const;
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// looks an address up in the cache
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ENTRY& lookup(const Address& address);
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const ENTRY& lookup(const Address& address) const;
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// Get/Set permission of cache block
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AccessPermission getPermission(const Address& address) const;
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void changePermission(const Address& address, AccessPermission new_perm);
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// Print cache contents
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void print(std::ostream& out) const;
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private:
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// Private copy constructor and assignment operator
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PerfectCacheMemory(const PerfectCacheMemory& obj);
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PerfectCacheMemory& operator=(const PerfectCacheMemory& obj);
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// Data Members (m_prefix)
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m5::hash_map<Address, PerfectCacheLineState<ENTRY> > m_map;
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};
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template<class ENTRY>
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inline std::ostream&
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operator<<(std::ostream& out, const PerfectCacheMemory<ENTRY>& obj)
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{
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obj.print(out);
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out << std::flush;
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return out;
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}
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template<class ENTRY>
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inline
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PerfectCacheMemory<ENTRY>::PerfectCacheMemory()
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{
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}
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// tests to see if an address is present in the cache
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template<class ENTRY>
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inline bool
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PerfectCacheMemory<ENTRY>::isTagPresent(const Address& address) const
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{
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return m_map.count(line_address(address)) > 0;
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}
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template<class ENTRY>
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inline bool
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PerfectCacheMemory<ENTRY>::cacheAvail(const Address& address) const
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{
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return true;
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}
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// find an Invalid or already allocated entry and sets the tag
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// appropriate for the address
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template<class ENTRY>
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inline void
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PerfectCacheMemory<ENTRY>::allocate(const Address& address)
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{
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PerfectCacheLineState<ENTRY> line_state;
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line_state.m_permission = AccessPermission_Invalid;
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line_state.m_entry = ENTRY();
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m_map[line_address(address)] = line_state;
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}
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// deallocate entry
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template<class ENTRY>
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inline void
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PerfectCacheMemory<ENTRY>::deallocate(const Address& address)
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{
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m_map.erase(line_address(address));
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}
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// Returns with the physical address of the conflicting cache line
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template<class ENTRY>
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inline Address
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PerfectCacheMemory<ENTRY>::cacheProbe(const Address& newAddress) const
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{
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panic("cacheProbe called in perfect cache");
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return newAddress;
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}
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// looks an address up in the cache
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template<class ENTRY>
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inline ENTRY&
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PerfectCacheMemory<ENTRY>::lookup(const Address& address)
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{
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return m_map[line_address(address)].m_entry;
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}
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// looks an address up in the cache
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template<class ENTRY>
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inline const ENTRY&
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PerfectCacheMemory<ENTRY>::lookup(const Address& address) const
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{
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return m_map[line_address(address)].m_entry;
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}
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template<class ENTRY>
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inline AccessPermission
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PerfectCacheMemory<ENTRY>::getPermission(const Address& address) const
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{
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return m_map[line_address(address)].m_permission;
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}
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template<class ENTRY>
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inline void
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PerfectCacheMemory<ENTRY>::changePermission(const Address& address,
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AccessPermission new_perm)
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{
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Address line_address = address;
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line_address.makeLineAddress();
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PerfectCacheLineState<ENTRY>& line_state = m_map[line_address];
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line_state.m_permission = new_perm;
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}
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template<class ENTRY>
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inline void
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PerfectCacheMemory<ENTRY>::print(std::ostream& out) const
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{
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}
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#endif // __MEM_RUBY_SYSTEM_PERFECTCACHEMEMORY_HH__
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