gem5/src/arch/arm/isa
2010-06-02 12:58:18 -05:00
..
decoder ARM: Decode the neon instruction space. 2010-06-02 12:58:18 -05:00
formats ARM: Decode the neon instruction space. 2010-06-02 12:58:18 -05:00
insts ARM: Decode to specialized conditional/unconditional versions of instructions. 2010-06-02 12:58:17 -05:00
templates ARM: Decode to specialized conditional/unconditional versions of instructions. 2010-06-02 12:58:17 -05:00
bitfields.isa ARM: Rearrange the load/store double/exclusive, table branch thumb decoding. 2010-06-02 12:58:07 -05:00
copyright.txt ARM: Remove IsControl from operands that don't imply control transfers. 2010-06-02 12:57:59 -05:00
includes.isa ARM: Implement the version of VMRS that writes to the APSR. 2010-06-02 12:58:15 -05:00
main.isa ARM: Define the load instructions from outside the decoder. 2010-06-02 12:58:01 -05:00
operands.isa ARM: Decode to specialized conditional/unconditional versions of instructions. 2010-06-02 12:58:17 -05:00