gem5/src/mem/cache/tags
Nikos Nikoleris 41bc2886de mem: Remove unused size field from the CacheBlk class
Change-Id: I6149290d6d2ac1a4bd6165871c93d7b7d6a980ad
Reviewed-by: Andreas Hansson <andreas.hansson@arm.com>
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2017-02-21 14:14:45 +00:00
..
base.cc mem: Split the hit_latency into tag_latency and data_latency 2016-11-30 17:10:27 -05:00
base.hh mem: Remove unused arguments (asid/contex_id) from accessBlock 2017-02-21 14:14:44 +00:00
base_set_assoc.cc mem: Remove unused size field from the CacheBlk class 2017-02-21 14:14:45 +00:00
base_set_assoc.hh mem: Remove unused arguments (asid/contex_id) from accessBlock 2017-02-21 14:14:44 +00:00
cacheset.hh mem: fix headers include order in the cache related classes 2016-05-26 11:56:24 +01:00
fa_lru.cc mem: Remove unused arguments (asid/contex_id) from accessBlock 2017-02-21 14:14:44 +00:00
fa_lru.hh mem: Remove unused arguments (asid/contex_id) from accessBlock 2017-02-21 14:14:44 +00:00
lru.cc mem: Remove unused arguments (asid/contex_id) from accessBlock 2017-02-21 14:14:44 +00:00
lru.hh mem: Remove unused arguments (asid/contex_id) from accessBlock 2017-02-21 14:14:44 +00:00
random_repl.cc mem: Remove unused arguments (asid/contex_id) from accessBlock 2017-02-21 14:14:44 +00:00
random_repl.hh mem: Remove unused arguments (asid/contex_id) from accessBlock 2017-02-21 14:14:44 +00:00
SConscript mem: refactor LRU cache tags and add random replacement tags 2014-07-28 12:23:23 -04:00
Tags.py mem: Split the hit_latency into tag_latency and data_latency 2016-11-30 17:10:27 -05:00