b5736ba4ef
A few prior changesets have changed the gem5 output in a way that wont cause errors but may be confusing for someone trying to debug the regressions. Ones that I caught were: - no more "warn: <hash address" - typo in the ALPHA Prefetch unimplemented warning Additionaly, the last updated stats changes rearrange the ordering of the stats output even though they are still correct stats (gem5 is smart enough to detect this). All the regressions pass w/the same stats even though it looks like they are being changed.
67 lines
6.3 KiB
Plaintext
67 lines
6.3 KiB
Plaintext
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---------- Begin Simulation Statistics ----------
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sim_seconds 1.004711 # Number of seconds simulated
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sim_ticks 1004710587000 # Number of ticks simulated
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sim_freq 1000000000000 # Frequency of simulated ticks
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host_inst_rate 3394241 # Simulator instruction rate (inst/s)
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host_tick_rate 1697486503 # Simulator tick rate (ticks/s)
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host_mem_usage 190248 # Number of bytes of host memory used
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host_seconds 591.88 # Real time elapsed on the host
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sim_insts 2008987605 # Number of instructions simulated
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system.cpu.dtb.fetch_hits 0 # ITB hits
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system.cpu.dtb.fetch_misses 0 # ITB misses
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system.cpu.dtb.fetch_acv 0 # ITB acv
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system.cpu.dtb.fetch_accesses 0 # ITB accesses
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system.cpu.dtb.read_hits 511070026 # DTB read hits
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system.cpu.dtb.read_misses 418884 # DTB read misses
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system.cpu.dtb.read_acv 0 # DTB read access violations
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system.cpu.dtb.read_accesses 511488910 # DTB read accesses
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system.cpu.dtb.write_hits 210794896 # DTB write hits
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system.cpu.dtb.write_misses 14581 # DTB write misses
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system.cpu.dtb.write_acv 0 # DTB write access violations
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system.cpu.dtb.write_accesses 210809477 # DTB write accesses
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system.cpu.dtb.data_hits 721864922 # DTB hits
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system.cpu.dtb.data_misses 433465 # DTB misses
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system.cpu.dtb.data_acv 0 # DTB access violations
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system.cpu.dtb.data_accesses 722298387 # DTB accesses
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system.cpu.itb.fetch_hits 2009421070 # ITB hits
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system.cpu.itb.fetch_misses 105 # ITB misses
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system.cpu.itb.fetch_acv 0 # ITB acv
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system.cpu.itb.fetch_accesses 2009421175 # ITB accesses
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system.cpu.itb.read_hits 0 # DTB read hits
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system.cpu.itb.read_misses 0 # DTB read misses
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system.cpu.itb.read_acv 0 # DTB read access violations
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system.cpu.itb.read_accesses 0 # DTB read accesses
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system.cpu.itb.write_hits 0 # DTB write hits
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system.cpu.itb.write_misses 0 # DTB write misses
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system.cpu.itb.write_acv 0 # DTB write access violations
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system.cpu.itb.write_accesses 0 # DTB write accesses
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system.cpu.itb.data_hits 0 # DTB hits
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system.cpu.itb.data_misses 0 # DTB misses
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system.cpu.itb.data_acv 0 # DTB access violations
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system.cpu.itb.data_accesses 0 # DTB accesses
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system.cpu.workload.num_syscalls 39 # Number of system calls
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system.cpu.numCycles 2009421175 # number of cpu cycles simulated
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system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
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system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
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system.cpu.num_insts 2008987605 # Number of instructions executed
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system.cpu.num_int_alu_accesses 1779374816 # Number of integer alu accesses
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system.cpu.num_fp_alu_accesses 71831671 # Number of float alu accesses
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system.cpu.num_func_calls 79910682 # number of times a function call or return occured
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system.cpu.num_conditional_control_insts 172959296 # number of instructions that are conditional controls
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system.cpu.num_int_insts 1779374816 # number of integer instructions
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system.cpu.num_fp_insts 71831671 # number of float instructions
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system.cpu.num_int_register_reads 2314712013 # number of times the integer registers were read
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system.cpu.num_int_register_writes 1332688300 # number of times the integer registers were written
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system.cpu.num_fp_register_reads 77066699 # number of times the floating registers were read
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system.cpu.num_fp_register_writes 52280770 # number of times the floating registers were written
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system.cpu.num_mem_refs 722298387 # number of memory refs
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system.cpu.num_load_insts 511488910 # Number of load instructions
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system.cpu.num_store_insts 210809477 # Number of store instructions
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system.cpu.num_idle_cycles 0 # Number of idle cycles
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system.cpu.num_busy_cycles 2009421175 # Number of busy cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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---------- End Simulation Statistics ----------
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