Andreas Hansson 3be4f4b846 mem: Fix a bug in the cache port flow control ... This patch fixes a bug in the cache port where the retry flag was reset too early, allowing new requests to arrive before the retry was actually sent, but with the event already scheduled. This caused a deadlock in the interactions with the O3 LSQ. The patche fixes the underlying issue by shifting the resetting of the flag to be done by the event that also calls sendRetry(). The patch also tidies up the flow control in recvTimingReq and ensures that we also check if we already have a retry outstanding.		2014-09-03 07:42:50 -04:00
..
prefetch	arch: Cleanup unused ISA traits constants	2014-09-03 07:42:21 -04:00
tags	mem: Properly set cache block status fields on writebacks	2014-08-13 06:57:24 -04:00
base.cc	mem: Fix a bug in the cache port flow control	2014-09-03 07:42:50 -04:00
base.hh	mem: Fix a bug in the cache port flow control	2014-09-03 07:42:50 -04:00
BaseCache.py	Cache: Collect very basic stats on tag and data accesses	2014-01-24 15:29:30 -06:00
blk.cc	mem: Add support for a security bit in the memory system	2014-01-24 15:29:30 -06:00
blk.hh	cpu, mem: Make software prefetches non-blocking	2014-05-13 12:20:49 -05:00
cache.cc	mem: refactor LRU cache tags and add random replacement tags	2014-07-28 12:23:23 -04:00
cache.hh	cpu, mem: Make software prefetches non-blocking	2014-05-13 12:20:49 -05:00
cache_impl.hh	mem: Fix a bug in the cache port flow control	2014-09-03 07:42:50 -04:00
mshr.cc	mem: Add support for a security bit in the memory system	2014-01-24 15:29:30 -06:00
mshr.hh	mem: Add support for a security bit in the memory system	2014-01-24 15:29:30 -06:00
mshr_queue.cc	mem: Squash prefetch requests from downstream caches	2014-05-09 18:58:46 -04:00
mshr_queue.hh	mem: Squash prefetch requests from downstream caches	2014-05-09 18:58:46 -04:00
SConscript	arch: Resurrect the NOISA build target and rename it NULL	2013-09-04 13:22:57 -04:00