gem5/arch
Gabe Black 3b7d756907 Working towards compiling SPARC_SE
arch/alpha/isa_traits.hh:
    Changed the enums to const ints, and got rid of a few unnecessary constants.
arch/sparc/isa_traits.hh:
    Got rid of the enums, and added in some missing constants.

--HG--
extra : convert_revision : ee47890af9d8c67300b31d8e0dda1d580bd21479
2006-03-08 08:09:27 -05:00
..
alpha Working towards compiling SPARC_SE 2006-03-08 08:09:27 -05:00
mips Filled out the object file loader so it can load object files for several OSs and architectures. 2006-03-04 03:09:23 -05:00
sparc Working towards compiling SPARC_SE 2006-03-08 08:09:27 -05:00
isa_parser.py Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included. 2006-03-03 15:28:25 -05:00
isa_specific.hh Auto-generate arch/foo.hh "switch headers" in scons. 2006-02-22 22:22:06 -05:00
SConscript Pushed ev5.hh out of the non-alpha code. 2006-03-07 14:08:01 -05:00