Ali Saidi 3a5c975fd7 arm: fix bare-metal memory setup. ... The bare-metal configuration option still configured memory with the old scheme that no-longer works. This change unifies the code so there aren't any differences.		2014-10-29 23:18:26 -05:00
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Benchmarks.py	configs: add run scripts for ics/gb versions of android and bbench	2012-06-11 11:07:42 -04:00
CacheConfig.py	mem: Rename Bus to XBar to better reflect its behaviour	2014-09-20 17:18:32 -04:00
Caches.py	config: Update script to set cache line size on system	2013-07-18 08:31:19 -04:00
cpu2000.py	arm: Add support for ARMv8 (AArch64 & AArch32)	2014-01-24 15:29:34 -06:00
CpuConfig.py	cpu: `Minor' in-order CPU model	2014-07-23 16:09:04 -05:00
FSConfig.py	arm: fix bare-metal memory setup.	2014-10-29 23:18:26 -05:00
MemConfig.py	config: separate function for instantiating a memory controller	2014-10-11 15:02:23 -05:00
O3_ARM_v7a.py	cpu: Change writeback modeling for outstanding instructions	2014-09-03 07:42:33 -04:00
Options.py	config: add num-work-ids command line option	2014-04-10 13:43:33 -05:00
Simulation.py	config: add num-work-ids command line option	2014-04-10 13:43:33 -05:00
SysPaths.py	make rcS files read from the m5 source directory, not /dist.	2006-11-08 14:10:25 -05:00