82 lines
3.4 KiB
C++
82 lines
3.4 KiB
C++
// -*- mode:c++ -*-
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// Copyright (c) 2009 The University of Edinburgh
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met: redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer;
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// redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution;
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// neither the name of the copyright holders nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Authors: Timothy M. Jones
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def operand_types {{
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'sb' : ('signed int', 8),
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'ub' : ('unsigned int', 8),
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'sh' : ('signed int', 16),
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'uh' : ('unsigned int', 16),
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'sw' : ('signed int', 32),
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'uw' : ('unsigned int', 32),
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'sq' : ('signed int', 64),
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'uq' : ('unsigned int', 64),
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'sf' : ('float', 32),
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'df' : ('float', 64)
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}};
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def operands {{
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# General Purpose Integer Reg Operands
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'Ra': ('IntReg', 'uw', 'RA', 'IsInteger', 1),
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'Rb': ('IntReg', 'uw', 'RB', 'IsInteger', 2),
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'Rs': ('IntReg', 'uw', 'RS', 'IsInteger', 3),
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'Rt': ('IntReg', 'uw', 'RT', 'IsInteger', 4),
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# General Purpose Floating Point Reg Operands
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'Fa': ('FloatReg', 'df', 'FRA', 'IsFloating', 1),
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'Fb': ('FloatReg', 'df', 'FRB', 'IsFloating', 2),
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'Fc': ('FloatReg', 'df', 'FRC', 'IsFloating', 3),
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'Fs': ('FloatReg', 'df', 'FRS', 'IsFloating', 4),
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'Ft': ('FloatReg', 'df', 'FRT', 'IsFloating', 5),
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# Memory Operand
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'Mem': ('Mem', 'uw', None, ('IsMemRef', 'IsLoad', 'IsStore'), 8),
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# Program counter and next
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'PC': ('PCState', 'uw', 'pc', (None, None, 'IsControl'), 9),
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'NPC': ('PCState', 'uw', 'npc', (None, None, 'IsControl'), 9),
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# Control registers
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'CR': ('IntReg', 'uw', 'INTREG_CR', 'IsInteger', 9),
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'LR': ('IntReg', 'uw', 'INTREG_LR', 'IsInteger', 9),
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'CTR': ('IntReg', 'uw', 'INTREG_CTR', 'IsInteger', 9),
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'XER': ('IntReg', 'uw', 'INTREG_XER', 'IsInteger', 9),
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# Setting as IntReg so things are stored as an integer, not double
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'FPSCR': ('IntReg', 'uw', 'INTREG_FPSCR', 'IsFloating', 9),
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# Registers for linked loads and stores
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'Rsv': ('IntReg', 'uw', 'INTREG_RSV', 'IsInteger', 9),
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'RsvLen': ('IntReg', 'uw', 'INTREG_RSV_LEN', 'IsInteger', 9),
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'RsvAddr': ('IntReg', 'uw', 'INTREG_RSV_ADDR', 'IsInteger', 9),
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# Hack for non-full-system syscall emulation
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'R0': ('IntReg', 'uw', '0', None, 1),
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}};
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