433 lines
9.3 KiB
C++
433 lines
9.3 KiB
C++
/*
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* Copyright (c) 2010 Gabe Black
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#ifndef __ARCH_GENERIC_TYPES_HH__
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#define __ARCH_GENERIC_TYPES_HH__
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#include <iostream>
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#include "base/trace.hh"
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#include "base/types.hh"
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#include "sim/serialize.hh"
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namespace GenericISA
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{
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// The guaranteed interface.
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class PCStateBase
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{
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protected:
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Addr _pc;
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Addr _npc;
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PCStateBase() {}
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PCStateBase(Addr val) { set(val); }
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public:
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/**
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* Returns the memory address the bytes of this instruction came from.
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*
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* @return Memory address of the current instruction's encoding.
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*/
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Addr
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instAddr() const
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{
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return _pc;
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}
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/**
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* Returns the memory address the bytes of the next instruction came from.
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*
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* @return Memory address of the next instruction's encoding.
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*/
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Addr
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nextInstAddr() const
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{
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return _npc;
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}
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/**
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* Returns the current micropc.
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*
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* @return The current micropc.
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*/
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MicroPC
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microPC() const
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{
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return 0;
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}
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/**
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* Force this PC to reflect a particular value, resetting all its other
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* fields around it. This is useful for in place (re)initialization.
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*
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* @param val The value to set the PC to.
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*/
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void set(Addr val);
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bool
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operator == (const PCStateBase &opc) const
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{
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return _pc == opc._pc && _npc == opc._npc;
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}
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void
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serialize(std::ostream &os)
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{
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SERIALIZE_SCALAR(_pc);
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SERIALIZE_SCALAR(_npc);
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}
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void
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unserialize(Checkpoint *cp, const std::string §ion)
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{
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UNSERIALIZE_SCALAR(_pc);
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UNSERIALIZE_SCALAR(_npc);
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}
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};
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/*
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* Different flavors of PC state. Only ISA specific code should rely on
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* any particular type of PC state being available. All other code should
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* use the interface above.
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*/
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// The most basic type of PC.
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template <class MachInst>
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class SimplePCState : public PCStateBase
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{
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protected:
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typedef PCStateBase Base;
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public:
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Addr pc() const { return _pc; }
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void pc(Addr val) { _pc = val; }
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Addr npc() const { return _npc; }
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void npc(Addr val) { _npc = val; }
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void
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set(Addr val)
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{
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pc(val);
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npc(val + sizeof(MachInst));
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};
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SimplePCState() {}
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SimplePCState(Addr val) { set(val); }
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bool
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branching() const
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{
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return this->npc() != this->pc() + sizeof(MachInst);
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}
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// Advance the PC.
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void
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advance()
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{
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_pc = _npc;
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_npc += sizeof(MachInst);
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}
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};
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template <class MachInst>
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std::ostream &
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operator<<(std::ostream & os, const SimplePCState<MachInst> &pc)
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{
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ccprintf(os, "(%#x=>%#x)", pc.pc(), pc.npc());
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return os;
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}
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// A PC and microcode PC.
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template <class MachInst>
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class UPCState : public SimplePCState<MachInst>
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{
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protected:
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typedef SimplePCState<MachInst> Base;
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MicroPC _upc;
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MicroPC _nupc;
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public:
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MicroPC upc() const { return _upc; }
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void upc(MicroPC val) { _upc = val; }
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MicroPC nupc() const { return _nupc; }
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void nupc(MicroPC val) { _nupc = val; }
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MicroPC
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microPC() const
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{
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return _upc;
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}
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void
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set(Addr val)
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{
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Base::set(val);
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upc(0);
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nupc(1);
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}
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UPCState() {}
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UPCState(Addr val) { set(val); }
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bool
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branching() const
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{
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return this->npc() != this->pc() + sizeof(MachInst) ||
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this->nupc() != this->upc() + 1;
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}
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// Advance the upc within the instruction.
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void
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uAdvance()
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{
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_upc = _nupc;
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_nupc++;
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}
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// End the macroop by resetting the upc and advancing the regular pc.
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void
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uEnd()
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{
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this->advance();
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_upc = 0;
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_nupc = 1;
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}
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bool
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operator == (const UPCState<MachInst> &opc) const
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{
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return Base::_pc == opc._pc &&
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Base::_npc == opc._npc &&
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_upc == opc._upc && _nupc == opc._nupc;
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}
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void
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serialize(std::ostream &os)
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{
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Base::serialize(os);
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SERIALIZE_SCALAR(_upc);
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SERIALIZE_SCALAR(_nupc);
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}
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void
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unserialize(Checkpoint *cp, const std::string §ion)
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{
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Base::unserialize(cp, section);
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UNSERIALIZE_SCALAR(_upc);
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UNSERIALIZE_SCALAR(_nupc);
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}
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};
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template <class MachInst>
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std::ostream &
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operator<<(std::ostream & os, const UPCState<MachInst> &pc)
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{
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ccprintf(os, "(%#x=>%#x).(%d=>%d)",
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pc.pc(), pc.npc(), pc.upc(), pc.npc());
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return os;
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}
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// A PC with a delay slot.
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template <class MachInst>
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class DelaySlotPCState : public SimplePCState<MachInst>
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{
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protected:
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typedef SimplePCState<MachInst> Base;
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Addr _nnpc;
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public:
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Addr nnpc() const { return _nnpc; }
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void nnpc(Addr val) { _nnpc = val; }
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void
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set(Addr val)
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{
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Base::set(val);
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nnpc(val + 2 * sizeof(MachInst));
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}
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DelaySlotPCState() {}
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DelaySlotPCState(Addr val) { set(val); }
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bool
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branching() const
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{
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return !(this->nnpc() == this->npc() + sizeof(MachInst) &&
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(this->npc() == this->pc() + sizeof(MachInst) ||
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this->npc() == this->pc() + 2 * sizeof(MachInst)));
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}
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// Advance the PC.
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void
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advance()
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{
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Base::_pc = Base::_npc;
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Base::_npc = _nnpc;
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_nnpc += sizeof(MachInst);
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}
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bool
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operator == (const DelaySlotPCState<MachInst> &opc) const
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{
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return Base::_pc == opc._pc &&
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Base::_npc == opc._npc &&
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_nnpc == opc._nnpc;
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}
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void
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serialize(std::ostream &os)
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{
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Base::serialize(os);
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SERIALIZE_SCALAR(_nnpc);
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}
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void
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unserialize(Checkpoint *cp, const std::string §ion)
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{
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Base::unserialize(cp, section);
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UNSERIALIZE_SCALAR(_nnpc);
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}
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};
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template <class MachInst>
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std::ostream &
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operator<<(std::ostream & os, const DelaySlotPCState<MachInst> &pc)
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{
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ccprintf(os, "(%#x=>%#x=>%#x)",
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pc.pc(), pc.npc(), pc.nnpc());
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return os;
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}
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// A PC with a delay slot and a microcode PC.
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template <class MachInst>
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class DelaySlotUPCState : public DelaySlotPCState<MachInst>
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{
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protected:
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typedef DelaySlotPCState<MachInst> Base;
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MicroPC _upc;
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MicroPC _nupc;
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public:
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MicroPC upc() const { return _upc; }
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void upc(MicroPC val) { _upc = val; }
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MicroPC nupc() const { return _nupc; }
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void nupc(MicroPC val) { _nupc = val; }
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MicroPC
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microPC() const
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{
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return _upc;
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}
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void
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set(Addr val)
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{
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Base::set(val);
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upc(0);
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nupc(1);
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}
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DelaySlotUPCState() {}
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DelaySlotUPCState(Addr val) { set(val); }
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bool
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branching() const
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{
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return Base::branching() || this->nupc() != this->upc() + 1;
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}
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// Advance the upc within the instruction.
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void
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uAdvance()
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{
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_upc = _nupc;
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_nupc++;
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}
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// End the macroop by resetting the upc and advancing the regular pc.
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void
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uEnd()
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{
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this->advance();
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_upc = 0;
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_nupc = 1;
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}
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bool
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operator == (const DelaySlotUPCState<MachInst> &opc) const
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{
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return Base::_pc == opc._pc &&
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Base::_npc == opc._npc &&
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Base::_nnpc == opc._nnpc &&
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_upc == opc._upc && _nupc == opc._nupc;
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}
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void
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serialize(std::ostream &os)
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{
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Base::serialize(os);
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SERIALIZE_SCALAR(_upc);
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SERIALIZE_SCALAR(_nupc);
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}
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void
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unserialize(Checkpoint *cp, const std::string §ion)
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{
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Base::unserialize(cp, section);
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UNSERIALIZE_SCALAR(_upc);
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UNSERIALIZE_SCALAR(_nupc);
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}
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};
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template <class MachInst>
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std::ostream &
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operator<<(std::ostream & os, const DelaySlotUPCState<MachInst> &pc)
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{
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ccprintf(os, "(%#x=>%#x=>%#x).(%d=>%d)",
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pc.pc(), pc.npc(), pc.nnpc(), pc.upc(), pc.nupc());
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return os;
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}
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}
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#endif
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