gem5/src/arch
Gabe Black 399e095510 X86: On a bad microopc, return a microop that returns a fault that panics.
This way a bad micropc will have to get all the way to commit before killing
the simulation. This accounts for misspeculated branches.
2011-02-13 17:42:56 -08:00
..
alpha Fault: Rename sim/fault.hh to fault_fwd.hh to distinguish it from faults.hh. 2011-02-03 21:47:58 -08:00
arm O3: Fix a few bugs in the TableWalker object. 2011-02-11 18:29:35 -06:00
generic X86: Define fault objects to carry debug messages. 2011-02-13 17:42:05 -08:00
mips inorder: remove unused isa ops 2011-02-12 10:14:26 -05:00
noisa SCons: Support building without an ISA 2010-11-19 18:00:39 -06:00
power Fault: Rename sim/fault.hh to fault_fwd.hh to distinguish it from faults.hh. 2011-02-03 21:47:58 -08:00
sparc Fault: Rename sim/fault.hh to fault_fwd.hh to distinguish it from faults.hh. 2011-02-03 21:47:58 -08:00
x86 X86: On a bad microopc, return a microop that returns a fault that panics. 2011-02-13 17:42:56 -08:00
isa_parser.py scons: show sources and targets when building, and colorize output. 2011-01-07 21:50:13 -08:00
micro_asm.py scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access 2009-09-22 15:24:16 -07:00
micro_asm_test.py Add a second section to make sure the ROM is extended properly. 2007-05-31 22:21:21 +00:00
SConscript scons: show sources and targets when building, and colorize output. 2011-01-07 21:50:13 -08:00