0534e355b7
and the entire packet respectively. --HG-- extra : convert_revision : 70b8bc8a2cf304d4c955d1a997df4a9a8edd4989
202 lines
6.3 KiB
C++
202 lines
6.3 KiB
C++
/*
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* Copyright (c) 2002-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* @file Decleration of a request, the overall memory request consisting of
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the parts of the request that are persistent throughout the transaction.
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*/
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#ifndef __MEM_REQUEST_HH__
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#define __MEM_REQUEST_HH__
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#include "arch/isa_traits.hh"
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class Request;
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typedef Request* RequestPtr;
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/** The request is a Load locked/store conditional. */
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const unsigned LOCKED = 0x001;
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/** The virtual address is also the physical address. */
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const unsigned PHYSICAL = 0x002;
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/** The request is an ALPHA VPTE pal access (hw_ld). */
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const unsigned VPTE = 0x004;
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/** Use the alternate mode bits in ALPHA. */
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const unsigned ALTMODE = 0x008;
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/** The request is to an uncacheable address. */
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const unsigned UNCACHEABLE = 0x010;
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/** The request should not cause a page fault. */
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const unsigned NO_FAULT = 0x020;
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/** The request should be prefetched into the exclusive state. */
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const unsigned PF_EXCLUSIVE = 0x100;
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/** The request should be marked as LRU. */
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const unsigned EVICT_NEXT = 0x200;
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/** The request should ignore unaligned access faults */
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const unsigned NO_ALIGN_FAULT = 0x400;
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class Request
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{
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//@todo Make Accesor functions, make these private.
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public:
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/** Constructor, needs a bool to signify if it is/isn't Cpu Request. */
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Request(bool isCpu);
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/** reset the request to it's initial state so it can be reused.*/
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void resetAll(bool isCpu);
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/** reset the request's addrs times, etc, so but not everything to same
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* time. */
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void resetMin();
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//First non-cpu request fields
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private:
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/** The physical address of the request. */
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Addr paddr;
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/** Wether or not paddr is valid (has been written yet). */
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bool validPaddr;
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/** The size of the request. */
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int size;
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/** Wether or not size is valid (has been written yet). */
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bool validSize;
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/** The time this request was started. Used to calculate latencies. */
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Tick time;
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/** Wether or not time is valid (has been written yet). */
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bool validTime;
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/** Destination address if this is a block copy. */
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Addr copyDest;
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/** Wether or not copyDest is valid (has been written yet). */
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bool validCopyDest;
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/** Flag structure for the request. */
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uint32_t flags;
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/** Wether or not flags is valid (has been written yet). */
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bool validFlags;
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//Accsesors for non-cpu request fields
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public:
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/** Accesor for paddr. */
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Addr getPaddr();
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/** Accesor for paddr. */
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void setPaddr(Addr _paddr);
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/** Accesor for size. */
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int getSize();
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/** Accesor for size. */
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void setSize(int _size);
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/** Accesor for time. */
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Tick getTime();
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/** Accesor for time. */
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void setTime(Tick _time);
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/** Accesor for copy dest. */
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Addr getCopyDest();
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/** Accesor for copy dest. */
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void setCopyDest(Addr _copyDest);
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/** Accesor for flags. */
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uint32_t getFlags();
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/** Accesor for paddr. */
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void setFlags(uint32_t _flags);
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//Now cpu-request fields
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private:
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/** Bool to signify if this is a cpuRequest. */
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bool cpuReq;
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/** The virtual address of the request. */
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Addr vaddr;
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/** Wether or not the vaddr is valid. */
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bool validVaddr;
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/** The address space ID. */
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int asid;
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/** Wether or not the asid is valid. */
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bool validAsid;
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/** The return value of store conditional. */
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uint64_t scResult;
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/** Wether or not the sc result is valid. */
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bool validScResult;
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/** The cpu number for statistics. */
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int cpuNum;
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/** Wether or not the cpu number is valid. */
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bool validCpuNum;
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/** The requesting thread id. */
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int threadNum;
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/** Wether or not the thread id is valid. */
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bool validThreadNum;
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/** program counter of initiating access; for tracing/debugging */
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Addr pc;
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/** Wether or not the pc is valid. */
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bool validPC;
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//Accessor Functions for cpu request fields
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public:
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/** Accesor function to determine if this is a cpu request or not.*/
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bool isCpuRequest();
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/** Accesor function for vaddr.*/
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Addr getVaddr();
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/** Accesor function for vaddr.*/
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void setVaddr(Addr _vaddr);
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/** Accesor function for asid.*/
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int getAsid();
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/** Accesor function for asid.*/
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void setAsid(int _asid);
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/** Accesor function for store conditional return value.*/
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uint64_t getScResult();
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/** Accesor function for store conditional return value.*/
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void setScResult(uint64_t _scResult);
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/** Accesor function for cpu number.*/
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int getCpuNum();
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/** Accesor function for cpu number.*/
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void setCpuNum(int _cpuNum);
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/** Accesor function for thread number.*/
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int getThreadNum();
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/** Accesor function for thread number.*/
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void setThreadNum(int _threadNum);
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/** Accesor function for pc.*/
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Addr getPC();
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/** Accesor function for pc.*/
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void setPC(Addr _pc);
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};
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#endif // __MEM_REQUEST_HH__
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