sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity
gem5/src/mem/ruby/system
History
Nilay Vaish 39e9445468 ruby: consumer: avoid using receiver side clock 
A set of patches was recently committed to allow multiple clock domains
in ruby. In those patches, I had inadvertently made an incorrect use of
the clocks. Suppose object A needs to schedule an event on object B. It
was possible that A accesses B's clock to schedule the event. This is not
possible in actual system. Hence, changes are being to the Consumer class
so as to avoid such happenings. Note that in a multi eventq simulation,
this can possibly lead to an incorrect simulation.

There are two functions in the Consumer class that are used for scheduling
events. The first function takes in the relative delay over the current time
as the argument and adds the current time to it for scheduling the event.
The second function takes in the absolute time (in ticks) for scheduling the
event. The first function is now being moved to protected section of the
class so that only objects of the derived classes can use it. All other
objects will have to specify absolute time while scheduling an event
for some consumer.
2013-03-22 15:53:26 -05:00
..
AbstractReplacementPolicy.hh ruby: replace Time with Tick in replacement policy classes 2013-02-10 21:43:08 -06:00
BankedArray.cc ruby banked array: do away with event scheduling 2012-10-15 17:27:15 -05:00
BankedArray.hh ruby banked array: do away with event scheduling 2012-10-15 17:27:15 -05:00
Cache.py ruby: replaces Time with Cycles in many places 2013-02-10 21:26:24 -06:00
CacheMemory.cc Ruby: Remove RubyEventQueue 2012-08-27 01:00:55 -05:00
CacheMemory.hh scons: Add warning for missing declarations 2013-02-19 05:56:07 -05:00
DirectoryMemory.cc Ruby: remove config information from ruby.stats 2012-07-12 08:39:19 -05:00
DirectoryMemory.hh Ruby: remove config information from ruby.stats 2012-07-12 08:39:19 -05:00
DirectoryMemory.py sim: Include object header files in SWIG interfaces 2012-11-02 11:32:01 -05:00
DMASequencer.cc ruby: enable multiple clock domains 2013-02-10 21:43:17 -06:00
DMASequencer.hh scons: Fix warnings issued by clang 3.2svn (XCode 4.6) 2013-02-19 05:56:08 -05:00
LRUPolicy.hh ruby: replace Time with Tick in replacement policy classes 2013-02-10 21:43:08 -06:00
MachineID.hh Ruby: Fix compilation errors on gcc 4.7 and clang 3.2 2013-02-14 12:24:51 -05:00
MemoryControl.cc ruby: improved support for functional accesses 2012-10-15 17:51:57 -05:00
MemoryControl.hh ruby: replace Time with Cycles in Memory Controller 2013-02-10 21:26:25 -06:00
MemoryControl.py sim: Include object header files in SWIG interfaces 2012-11-02 11:32:01 -05:00
MemoryNode.cc ruby: style pass 2010-03-22 18:43:53 -07:00
MemoryNode.hh ruby: replace Time with Cycles in Memory Controller 2013-02-10 21:26:25 -06:00
MemoryVector.hh Ruby: Use uint32_t instead of uint32 everywhere 2012-09-11 09:24:45 -05:00
PerfectCacheMemory.hh Ruby: remove config information from ruby.stats 2012-07-12 08:39:19 -05:00
PersistentTable.cc ruby: get rid of the Map class 2010-06-10 23:17:07 -07:00
PersistentTable.hh Ruby: remove config information from ruby.stats 2012-07-12 08:39:19 -05:00
PseudoLRUPolicy.hh ruby: replace Time with Tick in replacement policy classes 2013-02-10 21:43:08 -06:00
RubyMemoryControl.cc ruby: consumer: avoid using receiver side clock 2013-03-22 15:53:26 -05:00
RubyMemoryControl.hh scons: Add warning for missing declarations 2013-02-19 05:56:07 -05:00
RubyMemoryControl.py ruby: replaces Time with Cycles in many places 2013-02-10 21:26:24 -06:00
RubyPort.cc scons: Fix warnings issued by clang 3.2svn (XCode 4.6) 2013-02-19 05:56:08 -05:00
RubyPort.hh scons: Fix warnings issued by clang 3.2svn (XCode 4.6) 2013-02-19 05:56:08 -05:00
RubyPortProxy.cc MEM: Add port proxies instead of non-structural ports 2012-01-17 12:55:08 -06:00
RubyPortProxy.hh MEM: Add port proxies instead of non-structural ports 2012-01-17 12:55:08 -06:00
RubySystem.py ruby: convert block size, memory size to unsigned 2013-02-10 21:43:07 -06:00
SConscript ruby: banked cache array resource model 2012-07-10 22:51:54 -07:00
Sequencer.cc ruby: keep histogram of outstanding requests in seq 2013-03-22 15:53:25 -05:00
Sequencer.hh ruby: keep histogram of outstanding requests in seq 2013-03-22 15:53:25 -05:00
Sequencer.py ruby: remove the functional copy of memory in se mode 2013-03-06 21:53:57 -06:00
SparseMemory.cc Ruby Sparse Memory: Add function for collating blocks 2012-01-11 13:29:54 -06:00
SparseMemory.hh Ruby: remove config information from ruby.stats 2012-07-12 08:39:19 -05:00
System.cc ruby: fixes functional writes to RubyRequest 2013-03-02 23:12:55 -06:00
System.hh ruby: enable multiple clock domains 2013-02-10 21:43:17 -06:00
TBETable.hh ruby: replace Time with Cycles (final patch in the series) 2013-02-10 21:43:10 -06:00
TimerTable.cc ruby: consumer: avoid using receiver side clock 2013-03-22 15:53:26 -05:00
TimerTable.hh ruby: replace Time with Cycles (final patch in the series) 2013-02-10 21:43:10 -06:00
WireBuffer.cc ruby: consumer: avoid using receiver side clock 2013-03-22 15:53:26 -05:00
WireBuffer.hh scons: Add warning for missing declarations 2013-02-19 05:56:07 -05:00
WireBuffer.py sim: Include object header files in SWIG interfaces 2012-11-02 11:32:01 -05:00