gem5/src/arch/sparc/isa
2007-02-22 13:17:51 +00:00
..
formats rename store conditional stuff as extra data so it can be used for conditional swaps as well 2007-02-12 13:06:30 -05:00
base.isa Implemented fbfss and fbpfcc instructions, and cleaned up branch code a little. 2007-01-30 16:12:38 -05:00
bitfields.isa add pseduo instruction support for sparc 2007-02-21 21:06:17 -05:00
decoder.isa Make the m5 pseudo instructions only work in FS. Also, make sure any undefined opcodes in impdep2 (which in SE is all of them) trap with an illegal_instruction exception. 2007-02-22 13:17:51 +00:00
includes.isa add pseduo instruction support for sparc 2007-02-21 21:06:17 -05:00
main.isa Broke Load/Store instructions into microcode, and partially refactored memory operations in the SPARC ISA description. 2006-10-23 07:55:52 -04:00
operands.isa add pseduo instruction support for sparc 2007-02-21 21:06:17 -05:00