gem5/src/arch/sparc/isa/formats/nop.isa
Steve Reinhardt 3878895264 Fix to SPARC Nop class for multiple CPU models.
src/arch/sparc/isa/formats/nop.isa:
    Fix nop header so we can compile with multiple CPU models.
    (Former code re-defined Nop object for each model.)

--HG--
extra : convert_revision : 04e92622edf4dfefd9e149a17f604e17a93707c9
2006-05-22 22:15:22 -04:00

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3.6 KiB
Text

// Copyright (c) 2006 The Regents of The University of Michigan
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met: redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer;
// redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution;
// neither the name of the copyright holders nor the names of its
// contributors may be used to endorse or promote products derived from
// this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// Authors: Gabe Black
// Steve Reinhardt
////////////////////////////////////////////////////////////////////
//
// Nop instruction
//
// Per-cpu-model nop execute method.
def template NopExec {{
Fault execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
{
// Nothing to see here, move along
return NoFault;
}
}};
output header {{
/**
* Nop class.
*/
class Nop : public SparcStaticInst
{
public:
// Constructor
Nop(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
SparcStaticInst(mnem, _machInst, __opClass)
{
}
// All Nop instructions do the same thing, so this can be
// defined here. Nops can be defined directly, so there
// needs to be a default implementation. Interpolate via
// template so i gets expanded to a set of
// cpu-model-specific functions.
%(NopExec)s
std::string generateDisassembly(Addr pc,
const SymbolTable *symtab) const;
};
}};
output decoder {{
std::string Nop::generateDisassembly(Addr pc,
const SymbolTable *symtab) const
{
std::stringstream response;
printMnemonic(response, mnemonic);
return response.str();
}
}};
def template NopExecute {{
Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
//Nothing to see here, move along
return NoFault;
}
}};
// Primary format for integer operate instructions:
def format Nop(code, *opt_flags) {{
orig_code = code
cblk = CodeBlock(code)
iop = InstObjParams(name, Name, 'Nop', cblk, opt_flags)
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)
decode_block = BasicDecode.subst(iop)
exec_output = NopExecute.subst(iop)
}};