gem5/tests/test-progs/insttest/src/riscv/rv64m.h
Alec Roelke 33683bd087 riscv: [Patch 8/5] Added some regression tests to RISC-V
This patch is the eighth patch in a series adding RISC-V to gem5, and
third of the bonus patches to the original series of five. It adds some
regression tests to RISC-V.

Regression tests included:
- se/00.hello
- se/02.insttest (split into several binaries which are not included due
  to large size)

The tests added to 00.insttest will need to be build manually; to
facilitate this, a Makefile is included. The required toolchain and
compiler (riscv64-unknown-elf-gcc) can be built from the riscv-tools
GitHub repository at https://github.com/riscv/riscv-tools.

Note that because EBREAK only makes sense when gdb is running or while in
FS mode, it is not included in the linux-rv64i insttest. ERET is not
included because it does not make sense in SE mode and, in fact, causes
a panic by design.

Note also that not every system call is tested in linux-rv64i; of the ones
defined in linux/process.hh, some have been given numbers but not
definitions for the toolchain, or are merely stubs that always return 0. Of
the ones that do work properly, only a subset are tested due to similar
functionality.

Signed-off by: Alec Roelke

Signed-off by: Jason Lowe-Power <jason@lowepower.com>
2016-11-30 17:12:56 -05:00

145 lines
3.2 KiB
C++

/*
* Copyright (c) 2016 The University of Virginia
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Alec Roelke
*/
#pragma once
#include <cstdint>
#include "insttest.h"
namespace M
{
inline int64_t
mul(int64_t rs1, int64_t rs2)
{
int64_t rd = 0;
ROP("mul", rd, rs1, rs2);
return rd;
}
inline int64_t
mulh(int64_t rs1, int64_t rs2)
{
int64_t rd = 0;
ROP("mulh", rd, rs1, rs2);
return rd;
}
inline int64_t
mulhsu(int64_t rs1, uint64_t rs2)
{
int64_t rd = 0;
ROP("mulhsu", rd, rs1, rs2);
return rd;
}
inline uint64_t
mulhu(uint64_t rs1, uint64_t rs2)
{
uint64_t rd = 0;
ROP("mulhu", rd, rs1, rs2);
return rd;
}
inline int64_t
div(int64_t rs1, int64_t rs2)
{
int64_t rd = 0;
ROP("div", rd, rs1, rs2);
return rd;
}
inline uint64_t
divu(uint64_t rs1, uint64_t rs2)
{
uint64_t rd = 0;
ROP("divu", rd, rs1, rs2);
return rd;
}
inline int64_t
rem(int64_t rs1, int64_t rs2)
{
int64_t rd = 0;
ROP("rem", rd, rs1, rs2);
return rd;
}
inline uint64_t
remu(uint64_t rs1, uint64_t rs2)
{
uint64_t rd = 0;
ROP("remu", rd, rs1, rs2);
return rd;
}
inline int64_t
mulw(int64_t rs1, int64_t rs2)
{
int64_t rd = 0;
ROP("mulw", rd, rs1, rs2);
return rd;
}
inline int64_t
divw(int64_t rs1, int64_t rs2)
{
int64_t rd = 0;
ROP("divw", rd, rs1, rs2);
return rd;
}
inline uint64_t
divuw(uint64_t rs1, uint64_t rs2)
{
uint64_t rd = 0;
ROP("divuw", rd, rs1, rs2);
return rd;
}
inline int64_t
remw(int64_t rs1, int64_t rs2)
{
int64_t rd = 0;
ROP("remw", rd, rs1, rs2);
return rd;
}
inline uint64_t
remuw(uint64_t rs1, uint64_t rs2)
{
uint64_t rd = 0;
ROP("remuw", rd, rs1, rs2);
return rd;
}
} // namespace M