gem5/src/arch/sparc/isa
Gabe Black 3140dd88bc Make the fsr a serializing register. Other control registers probably need this as well.
--HG--
extra : convert_revision : edd3f9a83cc2722b6e0eff0eff4a8e034b0f6ec6
2007-04-14 17:07:24 +00:00
..
formats Make trying to execute macroops fail with a better error message. 2007-04-11 12:26:23 +00:00
base.isa Create a filter and a union to translate the SPARC instruction implementations from using doubles to using concatenated singles. 2007-04-11 12:25:00 +00:00
bitfields.isa add pseduo instruction support for sparc 2007-02-21 21:06:17 -05:00
decoder.isa The syntax used for twin stores was confusing the parser so it's now broken down farther. 2007-03-17 21:23:03 -04:00
includes.isa add pseduo instruction support for sparc 2007-02-21 21:06:17 -05:00
main.isa Broke Load/Store instructions into microcode, and partially refactored memory operations in the SPARC ISA description. 2006-10-23 07:55:52 -04:00
operands.isa Make the fsr a serializing register. Other control registers probably need this as well. 2007-04-14 17:07:24 +00:00