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Andreas Hansson 2c1052cd4d DMA: Refactor the DMA device and align timing and atomic
This patch does a bunch of house-keeping updates on the DMA, including
indentation, and formatting, but most importantly breaks out the
response handling such that it can be shared between the atomic and
timing modes. It also removes a potential bug caused by the atomic
handling of responses only deleting the allocated request (pkt->req)
once the DMA action completes instead of doing so for every packet.

Before this patch, the handling of responses was near identical for
atomic and timing, but the code was simply duplicated. With this
patch, the handleResp method deals with the responses in both cases.

There are further updates to make after removing the NACKs, but that
will be part of a separate follow-up patch. This patch does not change
the behaviour of any regression.
2012-08-22 11:40:01 -04:00
build_opts Regression: Add a test for x86 timing full system ruby simulation 2012-04-25 22:43:36 -05:00
configs Bridge: Remove NACKs in the bridge and unify with packet queue 2012-08-22 11:39:58 -04:00
ext clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6 2012-04-14 05:43:31 -04:00
src DMA: Refactor the DMA device and align timing and atomic 2012-08-22 11:40:01 -04:00
system ARM: Add support for Versatile Express extended memory map 2012-03-01 17:26:31 -06:00
tests Bridge: Remove NACKs in the bridge and unify with packet queue 2012-08-22 11:39:58 -04:00
util util: Fix issues with style checker. 2012-07-27 16:08:05 -04:00
.hgignore .hgignore: added src/doxygen 2010-07-27 20:00:38 -07:00
.hgtags Added tag stable_2012_06_28 for changeset f75ee4849c40 2012-07-19 16:53:02 -07:00
COPYING copyright: Add code for finding all copyright blocks and create a COPYING file 2011-06-02 17:36:07 -07:00
LICENSE copyright: Add code for finding all copyright blocks and create a COPYING file 2011-06-02 17:36:07 -07:00
README Info: Clean up some info files. 2011-02-14 21:36:37 -08:00
SConstruct scons: Add LIBRARY_PATH from the user environment to Scons 2012-07-12 12:56:11 -04:00

This is the M5 simulator.

For detailed information about building the simulator and getting
started please refer to http://www.m5sim.org.

Specific pages of interest are:
http://www.m5sim.org/wiki/index.php/Compiling_M5
http://www.m5sim.org/wiki/index.php/Running_M5

Short version:

1. If you don't have SCons version 0.98.1 or newer, get it from
http://wwww.scons.org.

2. If you don't have SWIG version 1.3.31 or newer, get it from
http://wwww.swig.org.

3. Make sure you also have gcc version 3.4.6 or newer, Python 2.4 or newer
(the dev version with header files), zlib, and the m4 preprocessor.

4. In this directory, type 'scons build/ALPHA_SE/tests/debug/quick'.  This
will build the debug version of the m5 binary (m5.debug) for the Alpha
syscall emulation target, and run the quick regression tests on it.

If you have questions, please send mail to m5-users@m5sim.org

WHAT'S INCLUDED (AND NOT)
-------------------------

The basic source release includes these subdirectories:
 - m5:
   - configs: simulation configuration scripts
   - ext: less-common external packages needed to build m5
   - src: source code of the m5 simulator
   - system: source for some optional system software for simulated systems
   - tests: regression tests
   - util: useful utility programs and files

To run full-system simulations, you will need compiled system firmware
(console and PALcode for Alpha), kernel binaries and one or more disk images. 
These files for Alpha are collected in a separate archive, m5_system.tar.bz2.
This file can he downloaded separately.

Depending on the ISA used, M5 may support Linux 2.4/2.6, FreeBSD, and the
proprietary Compaq/HP Tru64 version of Unix. We are able to distribute Linux
and FreeBSD bootdisks, but we are unable to distribute bootable disk images of
Tru64 Unix. If you have a Tru64 license and are interested in
obtaining disk images, contact us at m5-users@m5sim.org