286 lines
8.2 KiB
C++
286 lines
8.2 KiB
C++
/*
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* Copyright (c) 2010 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2006-2009 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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* Gabe Black
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*/
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#include <stdint.h>
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#include <cerrno>
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#include <cstdio>
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#include <cstring>
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#include <iostream>
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#include "arch/arm/tracechild.hh"
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using namespace std;
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ARMTraceChild::ARMTraceChild()
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{
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foundMvn = false;
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memset(®s, 0, sizeof(regs));
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memset(&oldregs, 0, sizeof(regs));
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memset(&fpregs, 0, sizeof(vfp_regs));
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memset(&oldfpregs, 0, sizeof(vfp_regs));
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for (int x = 0; x < numregs; x++) {
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regDiffSinceUpdate[x] = false;
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}
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assert(sizeof(regs.uregs)/sizeof(regs.uregs[0]) > CPSR);
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}
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bool
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ARMTraceChild::sendState(int socket)
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{
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uint32_t regVal = 0;
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uint64_t message[numregs + 1];
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int pos = 1;
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message[0] = 0;
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for (int x = 0; x < numregs; x++) {
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if (regDiffSinceUpdate[x]) {
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message[0] = message[0] | (1ULL << x);
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message[pos++] = getRegVal(x);
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}
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}
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size_t sent = 0;
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size_t toSend = pos * sizeof(message[0]);
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uint8_t *messagePtr = (uint8_t *)message;
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while (toSend != 0) {
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sent = write(socket, messagePtr, toSend);
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if (sent == -1) {
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cerr << "Write failed! " << strerror(errno) << endl;
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tracing = false;
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return false;
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}
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toSend -= sent;
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messagePtr += sent;
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}
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return true;
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}
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uint32_t
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ARMTraceChild::getRegs(user_regs &myregs, int num)
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{
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assert(num <= CPSR && num >= 0);
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return myregs.uregs[num];
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}
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uint64_t
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ARMTraceChild::getFpRegs(vfp_regs &my_fp_regs, int num)
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{
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assert(num >= F0 && num < numregs);
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if (num == FPSCR)
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return my_fp_regs.fpscr;
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num -= F0;
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return my_fp_regs.fpregs[num];
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}
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bool
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ARMTraceChild::update(int pid)
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{
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oldregs = regs;
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if (ptrace(PTRACE_GETREGS, pid, 0, ®s) != 0) {
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cerr << "update: " << strerror(errno) << endl;
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return false;
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}
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const uint32_t get_vfp_regs = 32;
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oldfpregs = fpregs;
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if (ptrace((__ptrace_request)get_vfp_regs, pid, 0, &fpregs) != 0) {
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cerr << "update: " << strerror(errno) << endl;
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return false;
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}
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for (unsigned int x = 0; x < numregs; x++)
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regDiffSinceUpdate[x] = (getRegVal(x) != getOldRegVal(x));
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return true;
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}
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int64_t
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ARMTraceChild::getRegVal(int num)
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{
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if (num <= CPSR)
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return getRegs(regs, num);
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else
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return (int64_t)getFpRegs(fpregs, num);
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}
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int64_t
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ARMTraceChild::getOldRegVal(int num)
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{
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if (num <= CPSR)
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return getRegs(oldregs, num);
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else
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return (int64_t)getFpRegs(oldfpregs, num);
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}
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ostream &
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ARMTraceChild::outputStartState(ostream & os)
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{
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uint32_t sp = getSP();
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uint32_t pc = getPC();
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uint32_t highestInfo = 0;
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char obuf[1024];
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sprintf(obuf, "Initial stack pointer = 0x%08x\n", sp);
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os << obuf;
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sprintf(obuf, "Initial program counter = 0x%08x\n", pc);
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os << obuf;
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//Output the argument count
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int32_t cargc = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
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sprintf(obuf, "0x%08x: Argc = 0x%08x\n", sp, cargc);
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os << obuf;
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sp += 4;
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//Output argv pointers
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int argCount = 0;
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int32_t cargv;
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do {
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cargv = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
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sprintf(obuf, "0x%08x: argv[%d] = 0x%08x\n",
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sp, argCount++, cargv);
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if (cargv)
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if (highestInfo < cargv)
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highestInfo = cargv;
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os << obuf;
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sp += 4;
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} while (cargv);
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//Output the envp pointers
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int envCount = 0;
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uint32_t cenvp;
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do {
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cenvp = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
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sprintf(obuf, "0x%08x: envp[%d] = 0x%08x\n",
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sp, envCount++, cenvp);
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os << obuf;
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sp += 4;
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} while (cenvp);
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uint32_t auxType, auxVal;
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do {
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auxType = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
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sp += 4;
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auxVal = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
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sp += 4;
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sprintf(obuf, "0x%08x: Auxiliary vector = {0x%08x, 0x%08x}\n",
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sp - 8, auxType, auxVal);
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os << obuf;
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} while (auxType != 0 || auxVal != 0);
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//Print out the argument strings, environment strings, and file name.
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string current;
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uint32_t buf;
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uint32_t currentStart = sp;
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bool clearedInitialPadding = false;
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do {
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buf = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
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char * cbuf = (char *)&buf;
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for (int x = 0; x < sizeof(uint32_t); x++) {
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if (cbuf[x])
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current += cbuf[x];
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else {
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sprintf(obuf, "0x%08x: \"%s\"\n",
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currentStart, current.c_str());
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os << obuf;
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current = "";
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currentStart = sp + x + 1;
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}
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}
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sp += 4;
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clearedInitialPadding = clearedInitialPadding || buf != 0;
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} while (!clearedInitialPadding || buf != 0 || sp <= highestInfo);
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return os;
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}
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bool
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ARMTraceChild::step()
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{
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const uint32_t bkpt_inst = 0xe7f001f0;
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uint32_t lr = getRegVal(14);
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uint32_t pc = getPC();
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uint32_t lrOp, subsOp;
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char obuf[128];
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bool patch = false;
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// Since ARM uses software breakpoints behind the scenes, they don't work
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// in read only areas like the page of routines provided by the kernel. The
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// link register generally holds the address the process wants to the
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// kernel to return to after it's done, so we'll install a software
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// breakpoint there.
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//
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// Calls into the kernel user page always follow the form:
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// MVN ...
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// <possible MOV lr,...>
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// SUB PC, ...
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//
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// So we look for this pattern and set a breakpoint on the LR at the SUB
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// instruction.
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subsOp = ptrace(PTRACE_PEEKDATA, pid, pc, 0);
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if ((subsOp & 0xFFFF0FFF) == 0xe3e00a0f)
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foundMvn = true;
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if (foundMvn && ((subsOp & 0xFFF0F000) == 0xe240f000)) {
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foundMvn = false;
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lrOp = ptrace(PTRACE_PEEKDATA, pid, lr, 0);
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ptrace(PTRACE_POKEDATA, pid, lr, bkpt_inst);
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patch = true;
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}
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ptraceSingleStep();
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if (patch)
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ptrace(PTRACE_POKEDATA, pid, lr, lrOp);
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}
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TraceChild *
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genTraceChild()
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{
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return new ARMTraceChild;
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}
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