f9d403a7b9
This patch introduces the notion of a master and slave port in the C++ code, thus bringing the previous classification from the Python classes into the corresponding simulation objects and memory objects. The patch enables us to classify behaviours into the two bins and add assumptions and enfore compliance, also simplifying the two interfaces. As a starting point, isSnooping is confined to a master port, and getAddrRanges to slave ports. More of these specilisations are to come in later patches. The getPort function is not getMasterPort and getSlavePort, and returns a port reference rather than a pointer as NULL would never be a valid return value. The default implementation of these two functions is placed in MemObject, and calls fatal. The one drawback with this specific patch is that it requires some code duplication, e.g. QueuedPort becomes QueuedMasterPort and QueuedSlavePort, and BusPort becomes BusMasterPort and BusSlavePort (avoiding multiple inheritance). With the later introduction of the port interfaces, moving the functionality outside the port itself, a lot of the duplicated code will disappear again.
136 lines
4.6 KiB
C++
136 lines
4.6 KiB
C++
/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Erik Hallnor
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* Nathan Binkert
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*/
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/**
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* @file
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* Simobject instatiation of caches.
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*/
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#include <list>
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#include <vector>
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#include "config/the_isa.hh"
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#include "mem/cache/base.hh"
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#include "mem/cache/cache.hh"
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#include "mem/config/cache.hh"
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#include "params/BaseCache.hh"
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// Tag Templates
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#if defined(USE_CACHE_LRU)
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#include "mem/cache/tags/lru.hh"
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#endif
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#if defined(USE_CACHE_FALRU)
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#include "mem/cache/tags/fa_lru.hh"
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#endif
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#if defined(USE_CACHE_IIC)
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#include "mem/cache/tags/iic.hh"
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#endif
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using namespace std;
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#define BUILD_CACHE(TAGS, tags) \
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do { \
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Cache<TAGS> *retval = \
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new Cache<TAGS>(this, tags); \
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return retval; \
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} while (0)
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#define BUILD_CACHE_PANIC(x) do { \
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panic("%s not compiled into M5", x); \
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} while (0)
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#if defined(USE_CACHE_FALRU)
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#define BUILD_FALRU_CACHE do { \
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FALRU *tags = new FALRU(block_size, size, latency); \
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BUILD_CACHE(FALRU, tags); \
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} while (0)
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#else
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#define BUILD_FALRU_CACHE BUILD_CACHE_PANIC("falru cache")
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#endif
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#if defined(USE_CACHE_LRU)
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#define BUILD_LRU_CACHE do { \
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LRU *tags = new LRU(numSets, block_size, assoc, latency); \
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BUILD_CACHE(LRU, tags); \
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} while (0)
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#else
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#define BUILD_LRU_CACHE BUILD_CACHE_PANIC("lru cache")
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#endif
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#if defined(USE_CACHE_IIC)
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#define BUILD_IIC_CACHE do { \
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IIC *tags = new IIC(iic_params); \
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BUILD_CACHE(IIC, tags); \
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} while (0)
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#else
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#define BUILD_IIC_CACHE BUILD_CACHE_PANIC("iic")
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#endif
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#define BUILD_CACHES do { \
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if (repl == NULL) { \
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if (numSets == 1) { \
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BUILD_FALRU_CACHE; \
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} else { \
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BUILD_LRU_CACHE; \
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} \
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} else { \
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BUILD_IIC_CACHE; \
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} \
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} while (0)
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BaseCache *
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BaseCacheParams::create()
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{
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int numSets = size / (assoc * block_size);
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if (subblock_size == 0) {
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subblock_size = block_size;
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}
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#if defined(USE_CACHE_IIC)
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// Build IIC params
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IIC::Params iic_params;
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iic_params.size = size;
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iic_params.numSets = numSets;
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iic_params.blkSize = block_size;
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iic_params.assoc = assoc;
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iic_params.hashDelay = hash_delay;
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iic_params.hitLatency = latency;
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iic_params.rp = repl;
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iic_params.subblockSize = subblock_size;
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#else
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const void *repl = NULL;
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#endif
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BUILD_CACHES;
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return NULL;
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}
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