2692590049
--HG-- extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251
132 lines
3.6 KiB
C++
132 lines
3.6 KiB
C++
/*
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* Copyright .AN) 2007 MIPS Technologies, Inc. All Rights Reserved
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*
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* This software is part of the M5 simulator.
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*
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* THIS IS A LEGAL AGREEMENT. BY DOWNLOADING, USING, COPYING, CREATING
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* DERIVATIVE WORKS, AND/OR DISTRIBUTING THIS SOFTWARE YOU ARE AGREEING
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* TO THESE TERMS AND CONDITIONS.
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*
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* Permission is granted to use, copy, create derivative works and
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* distribute this software and such derivative works for any purpose,
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* so long as (1) the copyright notice above, this grant of permission,
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* and the disclaimer below appear in all copies and derivative works
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* made, (2) the copyright notice above is augmented as appropriate to
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* reflect the addition of any new copyrightable work in a derivative
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* work (e.g., Copyright .AN) <Publication Year> Copyright Owner), and (3)
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* the name of MIPS Technologies, Inc. ($B!H(BMIPS$B!I(B) is not used in any
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* advertising or publicity pertaining to the use or distribution of
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* this software without specific, written prior authorization.
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*
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* THIS SOFTWARE IS PROVIDED $B!H(BAS IS.$B!I(B MIPS MAKES NO WARRANTIES AND
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* DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, IMPLIED OR
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* OTHERWISE, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND
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* NON-INFRINGEMENT OF THIRD PARTY RIGHTS, REGARDING THIS SOFTWARE.
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* IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES, INCLUDING DIRECT,
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* INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL, OR PUNITIVE DAMAGES OF
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* ANY KIND OR NATURE, ARISING OUT OF OR IN CONNECTION WITH THIS AGREEMENT,
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* THIS SOFTWARE AND/OR THE USE OF THIS SOFTWARE, WHETHER SUCH LIABILITY
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* IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR
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* STRICT LIABILITY), OR OTHERWISE, EVEN IF MIPS HAS BEEN WARNED OF THE
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* POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE.
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*
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* Authors: Ali G. Saidi
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*
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*/
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#ifndef __ARCH_MIPS_STACKTRACE_HH__
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#define __ARCH_MIPS_STACKTRACE_HH__
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#include "base/trace.hh"
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#include "cpu/static_inst.hh"
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class ThreadContext;
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namespace MipsISA
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{
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class ProcessInfo
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{
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private:
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ThreadContext *tc;
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int thread_info_size;
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int task_struct_size;
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int task_off;
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int pid_off;
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int name_off;
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public:
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ProcessInfo(ThreadContext *_tc);
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Addr task(Addr ksp) const;
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int pid(Addr ksp) const;
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std::string name(Addr ksp) const;
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};
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class StackTrace
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{
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protected:
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typedef TheISA::MachInst MachInst;
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private:
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ThreadContext *tc;
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std::vector<Addr> stack;
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private:
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bool isEntry(Addr addr);
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bool decodePrologue(Addr sp, Addr callpc, Addr func, int &size, Addr &ra);
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bool decodeSave(MachInst inst, int ®, int &disp);
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bool decodeStack(MachInst inst, int &disp);
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void trace(ThreadContext *tc, bool is_call);
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public:
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StackTrace();
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StackTrace(ThreadContext *tc, StaticInstPtr inst);
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~StackTrace();
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void clear()
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{
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tc = 0;
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stack.clear();
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}
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bool valid() const { return tc != NULL; }
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bool trace(ThreadContext *tc, StaticInstPtr inst);
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public:
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const std::vector<Addr> &getstack() const { return stack; }
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static const int user = 1;
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static const int console = 2;
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static const int unknown = 3;
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#if TRACING_ON
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private:
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void dump();
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public:
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void dprintf() { if (DTRACE(Stack)) dump(); }
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#else
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public:
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void dprintf() {}
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#endif
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};
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inline bool
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StackTrace::trace(ThreadContext *tc, StaticInstPtr inst)
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{
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if (!inst->isCall() && !inst->isReturn())
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return false;
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if (valid())
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clear();
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trace(tc, !inst->isReturn());
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return true;
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}
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}
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#endif // __ARCH_MIPS_STACKTRACE_HH__
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