1226 lines
31 KiB
C++
Executable file
1226 lines
31 KiB
C++
Executable file
/*
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* Copyright (c) 2007 MIPS Technologies, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Brett Miller
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*/
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#include "arch/mips/isa_traits.hh"
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#include "arch/mips/dsp.hh"
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#include "config/full_system.hh"
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#include "cpu/static_inst.hh"
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#include "sim/serialize.hh"
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#include "base/bitfield.hh"
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#include "base/misc.hh"
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using namespace MipsISA;
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using namespace std;
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int32_t
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MipsISA::bitrev( int32_t value )
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{
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int32_t result = 0;
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int i, shift;
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for( i=0; i<16; i++ )
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{
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shift = 2*i - 15;
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if( shift < 0 )
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result |= (value & 1L<<i) << -shift;
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else
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result |= (value & 1L<<i) >> shift;
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}
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return result;
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}
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uint64_t
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MipsISA::dspSaturate( uint64_t value, int32_t fmt, int32_t sign, uint32_t *overflow )
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{
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int64_t svalue;
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svalue = (int64_t)value;
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switch( sign )
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{
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case SIGNED:
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if( svalue > (int64_t)FIXED_SMAX[fmt] )
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{
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*overflow = 1;
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svalue = (int64_t)FIXED_SMAX[fmt];
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}
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else if( svalue < (int64_t)FIXED_SMIN[fmt] )
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{
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*overflow = 1;
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svalue = (int64_t)FIXED_SMIN[fmt];
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}
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break;
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case UNSIGNED:
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if( svalue > (int64_t)FIXED_UMAX[fmt] )
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{
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*overflow = 1;
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svalue = FIXED_UMAX[fmt];
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}
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else if( svalue < (int64_t)FIXED_UMIN[fmt] )
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{
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*overflow = 1;
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svalue = FIXED_UMIN[fmt];
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}
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break;
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}
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return( (uint64_t)svalue );
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}
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uint64_t
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MipsISA::checkOverflow( uint64_t value, int32_t fmt, int32_t sign, uint32_t *overflow )
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{
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int64_t svalue;
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svalue = (int64_t)value;
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switch( sign )
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{
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case SIGNED:
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if( svalue > (int64_t)FIXED_SMAX[fmt] || svalue < (int64_t)FIXED_SMIN[fmt] )
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*overflow = 1;
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break;
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case UNSIGNED:
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if( svalue > (int64_t)FIXED_UMAX[fmt] || svalue < (int64_t)FIXED_UMIN[fmt] )
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*overflow = 1;
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break;
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}
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return( (uint64_t)svalue );
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}
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uint64_t
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MipsISA::signExtend( uint64_t value, int32_t fmt )
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{
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int32_t signpos = SIMD_NBITS[fmt];
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uint64_t sign = uint64_t(1)<<(signpos-1);
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uint64_t ones = ~(0ULL);
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if( value & sign )
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value |= (ones << signpos); // extend with ones
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else
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value &= (ones >> (64 - signpos)); // extend with zeros
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return value;
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}
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uint64_t
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MipsISA::addHalfLsb( uint64_t value, int32_t lsbpos )
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{
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return( value += ULL(1) << (lsbpos-1) );
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}
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int32_t
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MipsISA::dspAbs( int32_t a, int32_t fmt, uint32_t *dspctl )
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{
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int i = 0;
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int nvals = SIMD_NVALS[fmt];
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int32_t result;
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int64_t svalue;
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uint32_t ouflag = 0;
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uint64_t a_values[SIMD_MAX_VALS];
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simdUnpack( a, a_values, fmt, SIGNED );
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for( i=0; i<nvals; i++ )
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{
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svalue = (int64_t)a_values[i];
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if( a_values[i] == FIXED_SMIN[fmt] )
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{
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a_values[i] = FIXED_SMAX[fmt];
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ouflag = 1;
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}
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else if( svalue < 0 )
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{
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a_values[i] = uint64_t( 0 - svalue );
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}
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}
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simdPack( a_values, &result, fmt );
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if( ouflag )
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writeDSPControl( dspctl, (ouflag<<4)<<DSP_CTL_POS[DSP_OUFLAG], 1<<DSP_OUFLAG);
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return( result );
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}
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int32_t
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MipsISA::dspAdd( int32_t a, int32_t b, int32_t fmt, int32_t saturate, int32_t sign, uint32_t *dspctl )
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{
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int i = 0;
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int nvals = SIMD_NVALS[fmt];
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int32_t result;
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uint32_t ouflag = 0;
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uint64_t a_values[SIMD_MAX_VALS];
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uint64_t b_values[SIMD_MAX_VALS];
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simdUnpack( a, a_values, fmt, sign );
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simdUnpack( b, b_values, fmt, sign );
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for( i=0; i<nvals; i++ )
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{
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if( saturate )
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a_values[i] = dspSaturate( a_values[i] + b_values[i], fmt, sign, &ouflag );
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else
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a_values[i] = checkOverflow( a_values[i] + b_values[i], fmt, sign, &ouflag );
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}
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simdPack( a_values, &result, fmt );
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if( ouflag )
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writeDSPControl( dspctl, (ouflag<<4)<<DSP_CTL_POS[DSP_OUFLAG], 1<<DSP_OUFLAG);
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return( result );
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}
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int32_t
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MipsISA::dspAddh( int32_t a, int32_t b, int32_t fmt, int32_t round, int32_t sign )
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{
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int i = 0;
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int nvals = SIMD_NVALS[fmt];
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int32_t result;
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uint64_t a_values[SIMD_MAX_VALS];
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uint64_t b_values[SIMD_MAX_VALS];
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simdUnpack( a, a_values, fmt, sign );
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simdUnpack( b, b_values, fmt, sign );
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for( i=0; i<nvals; i++ )
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{
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if( round )
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a_values[i] = addHalfLsb( a_values[i] + b_values[i], 1 ) >> 1;
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else
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a_values[i] = ( a_values[i] + b_values[i] ) >> 1;
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}
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simdPack( a_values, &result, fmt );
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return( result );
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}
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int32_t
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MipsISA::dspSub( int32_t a, int32_t b, int32_t fmt, int32_t saturate, int32_t sign, uint32_t *dspctl )
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{
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int i = 0;
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int nvals = SIMD_NVALS[fmt];
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int32_t result;
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uint32_t ouflag = 0;
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uint64_t a_values[SIMD_MAX_VALS];
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uint64_t b_values[SIMD_MAX_VALS];
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simdUnpack( a, a_values, fmt, sign );
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simdUnpack( b, b_values, fmt, sign );
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for( i=0; i<nvals; i++ )
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{
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if( saturate )
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a_values[i] = dspSaturate( a_values[i] - b_values[i], fmt, sign, &ouflag );
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else
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a_values[i] = checkOverflow( a_values[i] - b_values[i], fmt, sign, &ouflag );
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}
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simdPack( a_values, &result, fmt );
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if( ouflag )
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writeDSPControl( dspctl, (ouflag<<4)<<DSP_CTL_POS[DSP_OUFLAG], 1<<DSP_OUFLAG);
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return( result );
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}
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int32_t
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MipsISA::dspSubh( int32_t a, int32_t b, int32_t fmt, int32_t round, int32_t sign )
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{
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int i = 0;
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int nvals = SIMD_NVALS[fmt];
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int32_t result;
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uint64_t a_values[SIMD_MAX_VALS];
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uint64_t b_values[SIMD_MAX_VALS];
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simdUnpack( a, a_values, fmt, sign );
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simdUnpack( b, b_values, fmt, sign );
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for( i=0; i<nvals; i++ )
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{
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if( round )
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a_values[i] = addHalfLsb( a_values[i] - b_values[i], 1 ) >> 1;
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else
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a_values[i] = ( a_values[i] - b_values[i] ) >> 1;
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}
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simdPack( a_values, &result, fmt );
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return( result );
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}
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int32_t
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MipsISA::dspShll( int32_t a, uint32_t sa, int32_t fmt, int32_t saturate, int32_t sign, uint32_t *dspctl )
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{
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int i = 0;
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int nvals = SIMD_NVALS[fmt];
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int32_t result;
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uint32_t ouflag = 0;
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uint64_t a_values[SIMD_MAX_VALS];
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sa = bits( sa, SIMD_LOG2N[fmt]-1, 0 );
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simdUnpack( a, a_values, fmt, sign );
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for( i=0; i<nvals; i++ )
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{
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if( saturate )
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a_values[i] = dspSaturate( a_values[i] << sa, fmt, sign, &ouflag );
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else
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a_values[i] = checkOverflow( a_values[i] << sa, fmt, sign, &ouflag );
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}
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simdPack( a_values, &result, fmt );
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if( ouflag )
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writeDSPControl( dspctl, (ouflag<<6)<<DSP_CTL_POS[DSP_OUFLAG], 1<<DSP_OUFLAG);
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return( result );
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}
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int32_t
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MipsISA::dspShrl( int32_t a, uint32_t sa, int32_t fmt, int32_t sign )
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{
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int i = 0;
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int nvals = SIMD_NVALS[fmt];
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int32_t result;
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uint64_t a_values[SIMD_MAX_VALS];
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sa = bits( sa, SIMD_LOG2N[fmt]-1, 0 );
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simdUnpack( a, a_values, fmt, UNSIGNED );
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for( i=0; i<nvals; i++ )
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a_values[i] = a_values[i] >> sa;
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simdPack( a_values, &result, fmt );
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return( result );
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}
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int32_t
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MipsISA::dspShra( int32_t a, uint32_t sa, int32_t fmt, int32_t round, int32_t sign, uint32_t *dspctl )
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{
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int i = 0;
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int nvals = SIMD_NVALS[fmt];
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int32_t result;
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uint64_t a_values[SIMD_MAX_VALS];
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sa = bits( sa, SIMD_LOG2N[fmt]-1, 0 );
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simdUnpack( a, a_values, fmt, SIGNED );
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for( i=0; i<nvals; i++ )
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{
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if( round )
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a_values[i] = addHalfLsb( a_values[i], sa ) >> sa;
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else
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a_values[i] = a_values[i] >> sa;
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}
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simdPack( a_values, &result, fmt );
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return( result );
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}
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int32_t
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MipsISA::dspMulq( int32_t a, int32_t b, int32_t fmt, int32_t saturate, int32_t round, uint32_t *dspctl )
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{
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int i = 0;
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int nvals = SIMD_NVALS[fmt];
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int sa = SIMD_NBITS[fmt];
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int32_t result;
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uint32_t ouflag = 0;
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uint64_t a_values[SIMD_MAX_VALS];
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uint64_t b_values[SIMD_MAX_VALS];
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int64_t temp;
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simdUnpack( a, a_values, fmt, SIGNED );
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simdUnpack( b, b_values, fmt, SIGNED );
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for( i=0; i<nvals; i++ )
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{
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if( round )
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temp = (int64_t)addHalfLsb( a_values[i] * b_values[i] << 1, sa ) >> sa;
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else
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temp = (int64_t)(a_values[i] * b_values[i]) >> (sa - 1);
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if( a_values[i] == FIXED_SMIN[fmt] &&
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b_values[i] == FIXED_SMIN[fmt] )
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{
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ouflag = 1;
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if( saturate )
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temp = FIXED_SMAX[fmt];
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}
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a_values[i] = temp;
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}
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simdPack( a_values, &result, fmt );
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if( ouflag )
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writeDSPControl( dspctl, (ouflag<<5)<<DSP_CTL_POS[DSP_OUFLAG], 1<<DSP_OUFLAG);
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return( result );
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}
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int32_t
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MipsISA::dspMul( int32_t a, int32_t b, int32_t fmt, int32_t saturate, uint32_t *dspctl )
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{
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int i = 0;
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int nvals = SIMD_NVALS[fmt];
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int32_t result;
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uint32_t ouflag = 0;
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uint64_t a_values[SIMD_MAX_VALS];
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uint64_t b_values[SIMD_MAX_VALS];
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simdUnpack( a, a_values, fmt, SIGNED );
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simdUnpack( b, b_values, fmt, SIGNED );
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for( i=0; i<nvals; i++ )
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{
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if( saturate )
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a_values[i] = dspSaturate( a_values[i] * b_values[i], fmt, SIGNED, &ouflag );
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else
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a_values[i] = checkOverflow( a_values[i] * b_values[i], fmt, SIGNED, &ouflag );
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}
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simdPack( a_values, &result, fmt );
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if( ouflag )
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writeDSPControl( dspctl, (ouflag<<5)<<DSP_CTL_POS[DSP_OUFLAG], 1<<DSP_OUFLAG);
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return( result );
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}
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int32_t
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MipsISA::dspMuleu( int32_t a, int32_t b, int32_t mode, uint32_t *dspctl )
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{
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int i = 0;
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int nvals = SIMD_NVALS[SIMD_FMT_PH];
|
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int32_t result;
|
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uint32_t ouflag = 0;
|
|
uint64_t a_values[SIMD_MAX_VALS];
|
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uint64_t b_values[SIMD_MAX_VALS];
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|
|
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simdUnpack( a, a_values, SIMD_FMT_QB, UNSIGNED );
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simdUnpack( b, b_values, SIMD_FMT_PH, UNSIGNED );
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|
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switch( mode )
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{
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case MODE_L:
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for( i=0; i<nvals; i++ )
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b_values[i] = dspSaturate( a_values[i+2] * b_values[i], SIMD_FMT_PH, UNSIGNED, &ouflag );
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break;
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case MODE_R:
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for( i=0; i<nvals; i++ )
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b_values[i] = dspSaturate( a_values[i] * b_values[i], SIMD_FMT_PH, UNSIGNED, &ouflag );
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break;
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}
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|
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simdPack( b_values, &result, SIMD_FMT_PH );
|
|
|
|
if( ouflag )
|
|
writeDSPControl( dspctl, (ouflag<<5)<<DSP_CTL_POS[DSP_OUFLAG], 1<<DSP_OUFLAG);
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|
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return( result );
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}
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|
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int32_t
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MipsISA::dspMuleq( int32_t a, int32_t b, int32_t mode, uint32_t *dspctl )
|
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{
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int i = 0;
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int nvals = SIMD_NVALS[SIMD_FMT_W];
|
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int32_t result;
|
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uint32_t ouflag = 0;
|
|
uint64_t a_values[SIMD_MAX_VALS];
|
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uint64_t b_values[SIMD_MAX_VALS];
|
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uint64_t c_values[SIMD_MAX_VALS];
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|
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simdUnpack( a, a_values, SIMD_FMT_PH, SIGNED );
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simdUnpack( b, b_values, SIMD_FMT_PH, SIGNED );
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|
|
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switch( mode )
|
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{
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case MODE_L:
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for( i=0; i<nvals; i++ )
|
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c_values[i] = dspSaturate( a_values[i+1] * b_values[i+1] << 1,
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SIMD_FMT_W, SIGNED, &ouflag );
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break;
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case MODE_R:
|
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for( i=0; i<nvals; i++ )
|
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c_values[i] = dspSaturate( a_values[i] * b_values[i] << 1,
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SIMD_FMT_W, SIGNED, &ouflag );
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break;
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}
|
|
|
|
simdPack( c_values, &result, SIMD_FMT_W );
|
|
|
|
if( ouflag )
|
|
writeDSPControl( dspctl, (ouflag<<5)<<DSP_CTL_POS[DSP_OUFLAG], 1<<DSP_OUFLAG);
|
|
|
|
return( result );
|
|
}
|
|
|
|
int64_t
|
|
MipsISA::dspDpaq( int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t infmt,
|
|
int32_t outfmt, int32_t postsat, int32_t mode, uint32_t *dspctl )
|
|
{
|
|
int i = 0;
|
|
int nvals = SIMD_NVALS[infmt];
|
|
int64_t result = 0;
|
|
int64_t temp = 0;
|
|
uint32_t ouflag = 0;
|
|
uint64_t a_values[SIMD_MAX_VALS];
|
|
uint64_t b_values[SIMD_MAX_VALS];
|
|
|
|
simdUnpack( a, a_values, infmt, SIGNED );
|
|
simdUnpack( b, b_values, infmt, SIGNED );
|
|
|
|
for( i=0; i<nvals; i++ )
|
|
{
|
|
switch( mode )
|
|
{
|
|
case MODE_X:
|
|
if( a_values[nvals-1-i] == FIXED_SMIN[infmt] &&
|
|
b_values[i] == FIXED_SMIN[infmt] )
|
|
{
|
|
result += FIXED_SMAX[outfmt];
|
|
ouflag = 1;
|
|
}
|
|
else
|
|
result += a_values[nvals-1-i] * b_values[i] << 1;
|
|
break;
|
|
default:
|
|
if( a_values[i] == FIXED_SMIN[infmt] &&
|
|
b_values[i] == FIXED_SMIN[infmt] )
|
|
{
|
|
result += FIXED_SMAX[outfmt];
|
|
ouflag = 1;
|
|
}
|
|
else
|
|
result += a_values[i] * b_values[i] << 1;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if( postsat )
|
|
{
|
|
if( outfmt == SIMD_FMT_L )
|
|
{
|
|
int signa = bits( dspac, 63, 63 );
|
|
int signb = bits( result, 63, 63 );
|
|
|
|
temp = dspac + result;
|
|
|
|
if( ( signa == signb ) &&
|
|
( bits( temp, 63, 63 ) != signa ) )
|
|
{
|
|
ouflag = 1;
|
|
if( signa )
|
|
dspac = FIXED_SMIN[outfmt];
|
|
else
|
|
dspac = FIXED_SMAX[outfmt];
|
|
}
|
|
else
|
|
dspac = temp;
|
|
}
|
|
else
|
|
dspac = dspSaturate( dspac + result, outfmt, SIGNED, &ouflag );
|
|
}
|
|
else
|
|
dspac += result;
|
|
|
|
if( ouflag )
|
|
*dspctl = insertBits( *dspctl, 16+ac, 16+ac, 1 );
|
|
|
|
return( dspac );
|
|
}
|
|
|
|
int64_t
|
|
MipsISA::dspDpsq( int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t infmt,
|
|
int32_t outfmt, int32_t postsat, int32_t mode, uint32_t *dspctl )
|
|
{
|
|
int i = 0;
|
|
int nvals = SIMD_NVALS[infmt];
|
|
int64_t result = 0;
|
|
int64_t temp = 0;
|
|
uint32_t ouflag = 0;
|
|
uint64_t a_values[SIMD_MAX_VALS];
|
|
uint64_t b_values[SIMD_MAX_VALS];
|
|
|
|
simdUnpack( a, a_values, infmt, SIGNED );
|
|
simdUnpack( b, b_values, infmt, SIGNED );
|
|
|
|
for( i=0; i<nvals; i++ )
|
|
{
|
|
switch( mode )
|
|
{
|
|
case MODE_X:
|
|
if( a_values[nvals-1-i] == FIXED_SMIN[infmt] &&
|
|
b_values[i] == FIXED_SMIN[infmt] )
|
|
{
|
|
result += FIXED_SMAX[outfmt];
|
|
ouflag = 1;
|
|
}
|
|
else
|
|
result += a_values[nvals-1-i] * b_values[i] << 1;
|
|
break;
|
|
default:
|
|
if( a_values[i] == FIXED_SMIN[infmt] &&
|
|
b_values[i] == FIXED_SMIN[infmt] )
|
|
{
|
|
result += FIXED_SMAX[outfmt];
|
|
ouflag = 1;
|
|
}
|
|
else
|
|
result += a_values[i] * b_values[i] << 1;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if( postsat )
|
|
{
|
|
if( outfmt == SIMD_FMT_L )
|
|
{
|
|
int signa = bits( dspac, 63, 63 );
|
|
int signb = bits( -result, 63, 63 );
|
|
|
|
temp = dspac - result;
|
|
|
|
if( ( signa == signb ) &&
|
|
( bits( temp, 63, 63 ) != signa ) )
|
|
{
|
|
ouflag = 1;
|
|
if( signa )
|
|
dspac = FIXED_SMIN[outfmt];
|
|
else
|
|
dspac = FIXED_SMAX[outfmt];
|
|
}
|
|
else
|
|
dspac = temp;
|
|
}
|
|
else
|
|
dspac = dspSaturate( dspac - result, outfmt, SIGNED, &ouflag );
|
|
}
|
|
else
|
|
dspac -= result;
|
|
|
|
if( ouflag )
|
|
*dspctl = insertBits( *dspctl, 16+ac, 16+ac, 1 );
|
|
|
|
return( dspac );
|
|
}
|
|
|
|
int64_t
|
|
MipsISA::dspDpa( int64_t dspac, int32_t a, int32_t b, int32_t ac,
|
|
int32_t fmt, int32_t sign, int32_t mode )
|
|
{
|
|
int i = 0;
|
|
int nvals = SIMD_NVALS[fmt];
|
|
uint64_t a_values[SIMD_MAX_VALS];
|
|
uint64_t b_values[SIMD_MAX_VALS];
|
|
|
|
simdUnpack( a, a_values, fmt, sign );
|
|
simdUnpack( b, b_values, fmt, sign );
|
|
|
|
for( i=0; i<2; i++ )
|
|
{
|
|
switch( mode )
|
|
{
|
|
case MODE_L:
|
|
dspac += a_values[nvals-1-i] * b_values[nvals-1-i];
|
|
break;
|
|
case MODE_R:
|
|
dspac += a_values[nvals-3-i] * b_values[nvals-3-i];
|
|
break;
|
|
case MODE_X:
|
|
dspac += a_values[nvals-1-i] * b_values[i];
|
|
break;
|
|
}
|
|
}
|
|
|
|
return dspac;
|
|
}
|
|
|
|
int64_t
|
|
MipsISA::dspDps( int64_t dspac, int32_t a, int32_t b, int32_t ac,
|
|
int32_t fmt, int32_t sign, int32_t mode )
|
|
{
|
|
int i = 0;
|
|
int nvals = SIMD_NVALS[fmt];
|
|
uint64_t a_values[SIMD_MAX_VALS];
|
|
uint64_t b_values[SIMD_MAX_VALS];
|
|
|
|
simdUnpack( a, a_values, fmt, sign );
|
|
simdUnpack( b, b_values, fmt, sign );
|
|
|
|
for( i=0; i<2; i++ )
|
|
{
|
|
switch( mode )
|
|
{
|
|
case MODE_L:
|
|
dspac -= a_values[nvals-1-i] * b_values[nvals-1-i];
|
|
break;
|
|
case MODE_R:
|
|
dspac -= a_values[nvals-3-i] * b_values[nvals-3-i];
|
|
break;
|
|
case MODE_X:
|
|
dspac -= a_values[nvals-1-i] * b_values[i];
|
|
break;
|
|
}
|
|
}
|
|
|
|
return dspac;
|
|
}
|
|
|
|
int64_t
|
|
MipsISA::dspMaq( int64_t dspac, int32_t a, int32_t b, int32_t ac,
|
|
int32_t fmt, int32_t mode, int32_t saturate, uint32_t *dspctl )
|
|
{
|
|
int i = 0;
|
|
int nvals = SIMD_NVALS[fmt-1];
|
|
uint64_t a_values[SIMD_MAX_VALS];
|
|
uint64_t b_values[SIMD_MAX_VALS];
|
|
int64_t temp = 0;
|
|
uint32_t ouflag = 0;
|
|
|
|
simdUnpack( a, a_values, fmt, SIGNED );
|
|
simdUnpack( b, b_values, fmt, SIGNED );
|
|
|
|
for( i=0; i<nvals; i++ )
|
|
{
|
|
switch( mode )
|
|
{
|
|
case MODE_L:
|
|
temp = a_values[i+1] * b_values[i+1] << 1;
|
|
if( a_values[i+1] == FIXED_SMIN[fmt] && b_values[i+1] == FIXED_SMIN[fmt] )
|
|
{
|
|
temp = (int64_t)FIXED_SMAX[fmt-1];
|
|
ouflag = 1;
|
|
}
|
|
break;
|
|
case MODE_R:
|
|
temp = a_values[i] * b_values[i] << 1;
|
|
if( a_values[i] == FIXED_SMIN[fmt] && b_values[i] == FIXED_SMIN[fmt] )
|
|
{
|
|
temp = (int64_t)FIXED_SMAX[fmt-1];
|
|
ouflag = 1;
|
|
}
|
|
break;
|
|
}
|
|
|
|
temp += dspac;
|
|
|
|
if( saturate )
|
|
temp = dspSaturate( temp, fmt-1, SIGNED, &ouflag );
|
|
if( ouflag )
|
|
*dspctl = insertBits( *dspctl, 16+ac, 16+ac, 1 );
|
|
}
|
|
|
|
return temp;
|
|
}
|
|
|
|
int64_t
|
|
MipsISA::dspMulsa( int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt )
|
|
{
|
|
uint64_t a_values[SIMD_MAX_VALS];
|
|
uint64_t b_values[SIMD_MAX_VALS];
|
|
|
|
simdUnpack( a, a_values, fmt, SIGNED );
|
|
simdUnpack( b, b_values, fmt, SIGNED );
|
|
|
|
dspac += a_values[1] * b_values[1] - a_values[0] * b_values[0];
|
|
|
|
return dspac;
|
|
}
|
|
|
|
int64_t
|
|
MipsISA::dspMulsaq( int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt, uint32_t *dspctl )
|
|
{
|
|
int i = 0;
|
|
int nvals = SIMD_NVALS[fmt];
|
|
uint64_t a_values[SIMD_MAX_VALS];
|
|
uint64_t b_values[SIMD_MAX_VALS];
|
|
int64_t temp[2];
|
|
uint32_t ouflag = 0;
|
|
|
|
simdUnpack( a, a_values, fmt, SIGNED );
|
|
simdUnpack( b, b_values, fmt, SIGNED );
|
|
|
|
for( i=nvals-1; i>-1; i-- )
|
|
{
|
|
temp[i] = a_values[i] * b_values[i] << 1;
|
|
if( a_values[i] == FIXED_SMIN[fmt] &&
|
|
b_values[i] == FIXED_SMIN[fmt] )
|
|
{
|
|
temp[i] = FIXED_SMAX[fmt-1];
|
|
ouflag = 1;
|
|
}
|
|
}
|
|
|
|
dspac += temp[1] - temp[0];
|
|
|
|
if( ouflag )
|
|
*dspctl = insertBits( *dspctl, 16+ac, 16+ac, 1 );
|
|
|
|
return dspac;
|
|
}
|
|
|
|
void
|
|
MipsISA::dspCmp( int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op, uint32_t *dspctl )
|
|
{
|
|
int i = 0;
|
|
int nvals = SIMD_NVALS[fmt];
|
|
int ccond = 0;
|
|
uint64_t a_values[SIMD_MAX_VALS];
|
|
uint64_t b_values[SIMD_MAX_VALS];
|
|
|
|
simdUnpack( a, a_values, fmt, sign );
|
|
simdUnpack( b, b_values, fmt, sign );
|
|
|
|
for( i=0; i<nvals; i++ )
|
|
{
|
|
int cc = 0;
|
|
|
|
switch( op )
|
|
{
|
|
case CMP_EQ: cc = ( a_values[i] == b_values[i] ); break;
|
|
case CMP_LT: cc = ( a_values[i] < b_values[i] ); break;
|
|
case CMP_LE: cc = ( a_values[i] <= b_values[i] ); break;
|
|
}
|
|
|
|
ccond |= cc << ( DSP_CTL_POS[DSP_CCOND] + i );
|
|
}
|
|
|
|
writeDSPControl( dspctl, ccond, 1<<DSP_CCOND );
|
|
}
|
|
|
|
int32_t
|
|
MipsISA::dspCmpg( int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op )
|
|
{
|
|
int i = 0;
|
|
int nvals = SIMD_NVALS[fmt];
|
|
int32_t result = 0;
|
|
uint64_t a_values[SIMD_MAX_VALS];
|
|
uint64_t b_values[SIMD_MAX_VALS];
|
|
|
|
simdUnpack( a, a_values, fmt, sign );
|
|
simdUnpack( b, b_values, fmt, sign );
|
|
|
|
for( i=0; i<nvals; i++ )
|
|
{
|
|
int cc = 0;
|
|
|
|
switch( op )
|
|
{
|
|
case CMP_EQ: cc = ( a_values[i] == b_values[i] ); break;
|
|
case CMP_LT: cc = ( a_values[i] < b_values[i] ); break;
|
|
case CMP_LE: cc = ( a_values[i] <= b_values[i] ); break;
|
|
}
|
|
|
|
result |= cc << i;
|
|
}
|
|
|
|
return( result );
|
|
}
|
|
|
|
int32_t
|
|
MipsISA::dspCmpgd( int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op, uint32_t *dspctl )
|
|
{
|
|
int i = 0;;
|
|
int nvals = SIMD_NVALS[fmt];
|
|
int32_t result = 0;
|
|
int ccond = 0;
|
|
uint64_t a_values[SIMD_MAX_VALS];
|
|
uint64_t b_values[SIMD_MAX_VALS];
|
|
|
|
simdUnpack( a, a_values, fmt, sign );
|
|
simdUnpack( b, b_values, fmt, sign );
|
|
|
|
for( i=0; i<nvals; i++ )
|
|
{
|
|
int cc = 0;;
|
|
|
|
switch( op )
|
|
{
|
|
case CMP_EQ: cc = ( a_values[i] == b_values[i] ); break;
|
|
case CMP_LT: cc = ( a_values[i] < b_values[i] ); break;
|
|
case CMP_LE: cc = ( a_values[i] <= b_values[i] ); break;
|
|
}
|
|
|
|
result |= cc << i;
|
|
ccond |= cc << ( DSP_CTL_POS[DSP_CCOND] + i );
|
|
}
|
|
|
|
writeDSPControl( dspctl, ccond, 1<<DSP_CCOND );
|
|
|
|
return( result );
|
|
}
|
|
|
|
int32_t
|
|
MipsISA::dspPrece( int32_t a, int32_t infmt, int32_t insign, int32_t outfmt, int32_t outsign, int32_t mode )
|
|
{
|
|
int i = 0;
|
|
int sa = 0;
|
|
int ninvals = SIMD_NVALS[infmt];
|
|
int noutvals = SIMD_NVALS[outfmt];
|
|
int32_t result;
|
|
uint64_t in_values[SIMD_MAX_VALS];
|
|
uint64_t out_values[SIMD_MAX_VALS];
|
|
|
|
if( insign == SIGNED && outsign == SIGNED )
|
|
sa = SIMD_NBITS[infmt];
|
|
else if( insign == UNSIGNED && outsign == SIGNED )
|
|
sa = SIMD_NBITS[infmt] - 1;
|
|
else if( insign == UNSIGNED && outsign == UNSIGNED )
|
|
sa = 0;
|
|
|
|
simdUnpack( a, in_values, infmt, insign );
|
|
|
|
for( i=0; i<noutvals; i++ )
|
|
{
|
|
switch( mode )
|
|
{
|
|
case MODE_L: out_values[i] = in_values[i+(ninvals>>1)] << sa; break;
|
|
case MODE_R: out_values[i] = in_values[i] << sa; break;
|
|
case MODE_LA: out_values[i] = in_values[(i<<1)+1] << sa; break;
|
|
case MODE_RA: out_values[i] = in_values[i<<1] << sa; break;
|
|
}
|
|
}
|
|
|
|
simdPack( out_values, &result, outfmt );
|
|
|
|
return( result );
|
|
}
|
|
|
|
int32_t
|
|
MipsISA::dspPrecrqu( int32_t a, int32_t b, uint32_t *dspctl )
|
|
{
|
|
int i = 0;
|
|
uint64_t a_values[SIMD_MAX_VALS];
|
|
uint64_t b_values[SIMD_MAX_VALS];
|
|
uint64_t r_values[SIMD_MAX_VALS];
|
|
uint32_t ouflag = 0;
|
|
int32_t result = 0;
|
|
|
|
simdUnpack( a, a_values, SIMD_FMT_PH, SIGNED );
|
|
simdUnpack( b, b_values, SIMD_FMT_PH, SIGNED );
|
|
|
|
for( i=0; i<2; i++ )
|
|
{
|
|
r_values[i] = dspSaturate( (int64_t)b_values[i] >> SIMD_NBITS[SIMD_FMT_QB] - 1,
|
|
SIMD_FMT_QB, UNSIGNED, &ouflag );
|
|
r_values[i+2] = dspSaturate( (int64_t)a_values[i] >> SIMD_NBITS[SIMD_FMT_QB] - 1,
|
|
SIMD_FMT_QB, UNSIGNED, &ouflag );
|
|
}
|
|
|
|
simdPack( r_values, &result, SIMD_FMT_QB );
|
|
|
|
if( ouflag )
|
|
*dspctl = insertBits( *dspctl, 22, 22, 1 );
|
|
|
|
return result;
|
|
}
|
|
|
|
int32_t
|
|
MipsISA::dspPrecrq( int32_t a, int32_t b, int32_t fmt, uint32_t *dspctl )
|
|
{
|
|
uint64_t a_values[SIMD_MAX_VALS];
|
|
uint64_t b_values[SIMD_MAX_VALS];
|
|
uint64_t r_values[SIMD_MAX_VALS];
|
|
uint32_t ouflag = 0;
|
|
int32_t result;
|
|
|
|
simdUnpack( a, a_values, fmt, SIGNED );
|
|
simdUnpack( b, b_values, fmt, SIGNED );
|
|
|
|
r_values[1] = dspSaturate( (int64_t)addHalfLsb( a_values[0], 16 ) >> 16,
|
|
fmt+1, SIGNED, &ouflag );
|
|
r_values[0] = dspSaturate( (int64_t)addHalfLsb( b_values[0], 16 ) >> 16,
|
|
fmt+1, SIGNED, &ouflag );
|
|
|
|
simdPack( r_values, &result, fmt+1 );
|
|
|
|
if( ouflag )
|
|
*dspctl = insertBits( *dspctl, 22, 22, 1 );
|
|
|
|
return result;
|
|
}
|
|
|
|
int32_t
|
|
MipsISA::dspPrecrSra( int32_t a, int32_t b, int32_t sa, int32_t fmt, int32_t round )
|
|
{
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int i = 0;
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int nvals = SIMD_NVALS[fmt];
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|
uint64_t a_values[SIMD_MAX_VALS];
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uint64_t b_values[SIMD_MAX_VALS];
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uint64_t c_values[SIMD_MAX_VALS];
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int32_t result = 0;
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|
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simdUnpack( a, a_values, fmt, SIGNED );
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simdUnpack( b, b_values, fmt, SIGNED );
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|
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for( i=0; i<nvals; i++ )
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{
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if( round )
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|
{
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c_values[i] = addHalfLsb( b_values[i], sa ) >> sa;
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c_values[i+1] = addHalfLsb( a_values[i], sa ) >> sa;
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|
}
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else
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|
{
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c_values[i] = b_values[i] >> sa;
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c_values[i+1] = a_values[i] >> sa;
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}
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}
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|
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simdPack( c_values, &result, fmt+1 );
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|
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return result;
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}
|
|
|
|
int32_t
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MipsISA::dspPick( int32_t a, int32_t b, int32_t fmt, uint32_t *dspctl )
|
|
{
|
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int i = 0;
|
|
int nvals = SIMD_NVALS[fmt];
|
|
int32_t result;
|
|
uint64_t a_values[SIMD_MAX_VALS];
|
|
uint64_t b_values[SIMD_MAX_VALS];
|
|
uint64_t c_values[SIMD_MAX_VALS];
|
|
|
|
simdUnpack( a, a_values, fmt, UNSIGNED );
|
|
simdUnpack( b, b_values, fmt, UNSIGNED );
|
|
|
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for( i=0; i<nvals; i++ )
|
|
{
|
|
int condbit = DSP_CTL_POS[DSP_CCOND] + i;
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if( bits( *dspctl, condbit, condbit ) == 1 )
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c_values[i] = a_values[i];
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else
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c_values[i] = b_values[i];
|
|
}
|
|
|
|
simdPack( c_values, &result, fmt );
|
|
|
|
return( result );
|
|
}
|
|
|
|
int32_t
|
|
MipsISA::dspPack( int32_t a, int32_t b, int32_t fmt )
|
|
{
|
|
int32_t result;
|
|
uint64_t a_values[SIMD_MAX_VALS];
|
|
uint64_t b_values[SIMD_MAX_VALS];
|
|
uint64_t c_values[SIMD_MAX_VALS];
|
|
|
|
simdUnpack( a, a_values, fmt, UNSIGNED );
|
|
simdUnpack( b, b_values, fmt, UNSIGNED );
|
|
|
|
c_values[0] = b_values[1];
|
|
c_values[1] = a_values[0];
|
|
|
|
simdPack( c_values, &result, fmt );
|
|
|
|
return( result );
|
|
}
|
|
|
|
int32_t
|
|
MipsISA::dspExtr( int64_t dspac, int32_t fmt, int32_t sa, int32_t round, int32_t saturate, uint32_t *dspctl )
|
|
{
|
|
int32_t result = 0;
|
|
uint32_t ouflag = 0;
|
|
int64_t temp = 0;
|
|
|
|
sa = bits( sa, 4, 0 );
|
|
|
|
if( sa > 0 )
|
|
{
|
|
if( round )
|
|
{
|
|
temp = (int64_t)addHalfLsb( dspac, sa );
|
|
|
|
if( dspac > 0 && temp < 0 )
|
|
{
|
|
ouflag = 1;
|
|
if( saturate )
|
|
temp = FIXED_SMAX[SIMD_FMT_L];
|
|
}
|
|
temp = temp >> sa;
|
|
}
|
|
else
|
|
temp = dspac >> sa;
|
|
}
|
|
else
|
|
temp = dspac;
|
|
|
|
dspac = checkOverflow( dspac, fmt, SIGNED, &ouflag );
|
|
|
|
if( ouflag )
|
|
{
|
|
*dspctl = insertBits( *dspctl, 23, 23, ouflag );
|
|
|
|
if( saturate )
|
|
result = (int32_t)dspSaturate( temp, fmt, SIGNED, &ouflag );
|
|
else
|
|
result = (int32_t)temp;
|
|
}
|
|
else
|
|
result = (int32_t)temp;
|
|
|
|
return( result );
|
|
}
|
|
|
|
int32_t
|
|
MipsISA::dspExtp( int64_t dspac, int32_t size, uint32_t *dspctl )
|
|
{
|
|
int32_t pos = 0;
|
|
int32_t result = 0;
|
|
|
|
pos = bits( *dspctl, 5, 0 );
|
|
size = bits( size, 4, 0 );
|
|
|
|
if( pos - (size+1) >= -1 )
|
|
{
|
|
result = bits( dspac, pos, pos-size );
|
|
*dspctl = insertBits( *dspctl, 14, 14, 0 );
|
|
}
|
|
else
|
|
{
|
|
result = 0;
|
|
*dspctl = insertBits( *dspctl, 14, 14, 1 );
|
|
}
|
|
|
|
return( result );
|
|
}
|
|
|
|
int32_t
|
|
MipsISA::dspExtpd( int64_t dspac, int32_t size, uint32_t *dspctl )
|
|
{
|
|
int32_t pos = 0;
|
|
int32_t result = 0;
|
|
|
|
pos = bits( *dspctl, 5, 0 );
|
|
size = bits( size, 4, 0 );
|
|
|
|
if( pos - (size+1) >= -1 )
|
|
{
|
|
result = bits( dspac, pos, pos-size );
|
|
*dspctl = insertBits( *dspctl, 14, 14, 0 );
|
|
if( pos - (size+1) >= 0 )
|
|
*dspctl = insertBits( *dspctl, 5, 0, pos - (size+1) );
|
|
else if( (pos - (size+1)) == -1 )
|
|
*dspctl = insertBits( *dspctl, 5, 0, 63 );
|
|
}
|
|
else
|
|
{
|
|
result = 0;
|
|
*dspctl = insertBits( *dspctl, 14, 14, 1 );
|
|
}
|
|
|
|
return( result );
|
|
}
|
|
|
|
void
|
|
MipsISA::simdPack( uint64_t *values_ptr, int32_t *reg, int32_t fmt )
|
|
{
|
|
int i = 0;
|
|
int nvals = SIMD_NVALS[fmt];
|
|
int nbits = SIMD_NBITS[fmt];
|
|
|
|
*reg = 0;
|
|
|
|
for( i=0; i<nvals; i++ )
|
|
*reg |= (int32_t)bits( values_ptr[i], nbits-1, 0 ) << nbits*i;
|
|
}
|
|
|
|
void
|
|
MipsISA::simdUnpack( int32_t reg, uint64_t *values_ptr, int32_t fmt, int32_t sign )
|
|
{
|
|
int i = 0;
|
|
int nvals = SIMD_NVALS[fmt];
|
|
int nbits = SIMD_NBITS[fmt];
|
|
|
|
switch( sign )
|
|
{
|
|
case SIGNED:
|
|
for( i=0; i<nvals; i++ )
|
|
{
|
|
values_ptr[i] = (uint64_t)bits( reg, nbits*(i+1)-1, nbits*i );
|
|
values_ptr[i] = signExtend( values_ptr[i], fmt );
|
|
}
|
|
break;
|
|
case UNSIGNED:
|
|
for( i=0; i<nvals; i++ )
|
|
{
|
|
values_ptr[i] = (uint64_t)bits( reg, nbits*(i+1)-1, nbits*i );
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
|
|
void
|
|
MipsISA::writeDSPControl( uint32_t *dspctl, uint32_t value, uint32_t mask )
|
|
{
|
|
uint32_t fmask = 0;
|
|
|
|
if( mask & 0x01 ) fmask |= DSP_CTL_MASK[DSP_POS];
|
|
if( mask & 0x02 ) fmask |= DSP_CTL_MASK[DSP_SCOUNT];
|
|
if( mask & 0x04 ) fmask |= DSP_CTL_MASK[DSP_C];
|
|
if( mask & 0x08 ) fmask |= DSP_CTL_MASK[DSP_OUFLAG];
|
|
if( mask & 0x10 ) fmask |= DSP_CTL_MASK[DSP_CCOND];
|
|
if( mask & 0x20 ) fmask |= DSP_CTL_MASK[DSP_EFI];
|
|
|
|
*dspctl &= ~fmask;
|
|
value &= fmask;
|
|
*dspctl |= value;
|
|
}
|
|
|
|
uint32_t
|
|
MipsISA::readDSPControl( uint32_t *dspctl, uint32_t mask )
|
|
{
|
|
uint32_t fmask = 0;
|
|
|
|
if( mask & 0x01 ) fmask |= DSP_CTL_MASK[DSP_POS];
|
|
if( mask & 0x02 ) fmask |= DSP_CTL_MASK[DSP_SCOUNT];
|
|
if( mask & 0x04 ) fmask |= DSP_CTL_MASK[DSP_C];
|
|
if( mask & 0x08 ) fmask |= DSP_CTL_MASK[DSP_OUFLAG];
|
|
if( mask & 0x10 ) fmask |= DSP_CTL_MASK[DSP_CCOND];
|
|
if( mask & 0x20 ) fmask |= DSP_CTL_MASK[DSP_EFI];
|
|
|
|
return( *dspctl & fmask );
|
|
}
|