61 lines
2.9 KiB
C
61 lines
2.9 KiB
C
/*
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* Copyright (c) 2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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* Miguel Serrano
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* Nathan Binkert
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*/
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#define RTC_SEC 0x00
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#define RTC_SEC_ALRM 0x01
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#define RTC_MIN 0x02
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#define RTC_MIN_ALRM 0x03
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#define RTC_HR 0x04
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#define RTC_HR_ALRM 0x05
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#define RTC_DOW 0x06
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#define RTC_DOM 0x07
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#define RTC_MON 0x08
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#define RTC_YEAR 0x09
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#define RTC_STAT_REGA 0x0A
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#define RTCA_1024HZ 0x06 /* 1024Hz periodic interrupt frequency */
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#define RTCA_32768HZ 0x20 /* 22-stage divider, 32.768KHz timebase */
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#define RTCA_UIP 0x80 /* 1 = date and time update in progress */
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#define RTC_STAT_REGB 0x0B
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#define RTCB_DST 0x01 /* USA Daylight Savings Time enable */
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#define RTCB_24HR 0x02 /* 0 = 12 hours, 1 = 24 hours */
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#define RTCB_BIN 0x04 /* 0 = BCD, 1 = Binary coded time */
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#define RTCB_SQWE 0x08 /* 1 = output sqare wave at SQW pin */
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#define RTCB_UPDT_IE 0x10 /* 1 = enable update-ended interrupt */
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#define RTCB_ALRM_IE 0x20 /* 1 = enable alarm interrupt */
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#define RTCB_PRDC_IE 0x40 /* 1 = enable periodic clock interrupt */
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#define RTCB_NO_UPDT 0x80 /* stop clock updates */
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#define RTC_STAT_REGC 0x0C
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#define RTC_STAT_REGD 0x0D
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