25693e9e69
arch/alpha/alpha_memory.cc: arch/alpha/alpha_memory.hh: arch/alpha/arguments.cc: arch/alpha/arguments.hh: arch/alpha/ev5.cc: arch/alpha/ev5.hh: arch/alpha/fake_syscall.cc: arch/alpha/faults.cc: arch/alpha/isa_desc: arch/alpha/isa_traits.hh: arch/alpha/osfpal.cc: arch/alpha/vtophys.cc: arch/alpha/vtophys.hh: base/circlebuf.cc: base/compression/lzss_compression.cc: base/compression/lzss_compression.hh: base/cprintf.cc: base/cprintf.hh: base/fast_alloc.cc: base/fifo_buffer.cc: base/fifo_buffer.hh: base/hashmap.hh: base/hostinfo.cc: base/hostinfo.hh: base/hybrid_pred.cc: base/hybrid_pred.hh: base/inet.cc: base/inet.hh: base/inifile.cc: base/inifile.hh: base/intmath.cc: base/loader/aout_object.cc: base/loader/aout_object.hh: base/loader/ecoff_object.cc: base/loader/ecoff_object.hh: base/loader/elf_object.cc: base/loader/elf_object.hh: base/loader/exec_aout.h: base/loader/exec_ecoff.h: base/loader/object_file.cc: base/loader/object_file.hh: base/loader/symtab.cc: base/loader/symtab.hh: base/misc.cc: base/misc.hh: base/pollevent.cc: base/pollevent.hh: base/random.cc: base/random.hh: base/range.hh: base/remote_gdb.cc: base/remote_gdb.hh: base/res_list.hh: base/sat_counter.cc: base/sat_counter.hh: base/sched_list.hh: base/socket.cc: base/statistics.cc: base/statistics.hh: base/str.cc: base/trace.cc: base/trace.hh: cpu/base_cpu.cc: cpu/base_cpu.hh: cpu/exec_context.cc: cpu/exec_context.hh: cpu/exetrace.cc: cpu/exetrace.hh: cpu/intr_control.cc: cpu/intr_control.hh: cpu/memtest/memtest.cc: cpu/memtest/memtest.hh: cpu/pc_event.cc: cpu/pc_event.hh: cpu/simple_cpu/simple_cpu.cc: cpu/simple_cpu/simple_cpu.hh: cpu/static_inst.cc: cpu/static_inst.hh: dev/alpha_console.cc: dev/alpha_console.hh: dev/console.cc: dev/console.hh: dev/disk_image.cc: dev/disk_image.hh: dev/etherbus.cc: dev/etherbus.hh: dev/etherdump.cc: dev/etherdump.hh: dev/etherint.cc: dev/etherint.hh: dev/etherlink.cc: dev/etherlink.hh: dev/etherpkt.hh: dev/ethertap.cc: dev/ethertap.hh: dev/simple_disk.cc: dev/simple_disk.hh: kern/tru64/tru64_syscalls.cc: kern/tru64/tru64_syscalls.hh: sim/debug.cc: sim/eventq.cc: sim/eventq.hh: sim/main.cc: sim/param.cc: sim/param.hh: sim/prog.cc: sim/prog.hh: sim/serialize.cc: sim/serialize.hh: sim/sim_events.cc: sim/sim_events.hh: sim/sim_object.cc: sim/sim_object.hh: sim/sim_time.cc: sim/system.cc: sim/system.hh: sim/universe.cc: test/circletest.cc: test/cprintftest.cc: test/initest.cc: test/nmtest.cc: test/offtest.cc: test/paramtest.cc: test/rangetest.cc: test/stattest.cc: test/strnumtest.cc: test/symtest.cc: test/tokentest.cc: test/tracetest.cc: util/tap/tap.cc: Make include paths explicit. --HG-- extra : convert_revision : 941cbdc591fd4d3d1d9f095cd58fc23dd2d73840
178 lines
5.6 KiB
C++
178 lines
5.6 KiB
C++
/*
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* Copyright (c) 2003 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __PROG_HH__
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#define __PROG_HH__
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//
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// The purpose of this code is to fake the loader & syscall mechanism
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// when there's no OS: thus there's no reason to use it in FULL_SYSTEM
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// mode when we do have an OS.
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//
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#ifndef FULL_SYSTEM
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#include <list>
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#include "targetarch/isa_traits.hh"
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#include "sim/sim_object.hh"
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#include "sim/sim_stats.hh"
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#include "base/statistics.hh"
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class ExecContext;
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class FunctionalMemory;
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class Process : public SimObject
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{
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public:
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// have we initialized an execution context from this process? If
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// yes, subsequent contexts are assumed to be for dynamically
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// created threads and are not initialized.
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bool initialContextLoaded;
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// execution contexts associated with this process
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std::list<ExecContext *> execContexts;
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// number of CPUs assigned to this process: should match number of
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// contexts in execContexts list
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unsigned numCpus;
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// record of blocked context
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struct WaitRec
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{
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Addr waitChan;
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ExecContext *waitingContext;
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WaitRec(Addr chan, ExecContext *ctx)
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: waitChan(chan), waitingContext(ctx)
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{
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}
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};
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// list of all blocked contexts
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std::list<WaitRec> waitList;
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RegFile *init_regs; // initial register contents
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Addr text_base; // text (code) segment base
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unsigned text_size; // text (code) size in bytes
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Addr data_base; // initialized data segment base
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unsigned data_size; // initialized data + bss size in bytes
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Addr brk_point; // top of the data segment
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Addr stack_base; // stack segment base (highest address)
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unsigned stack_size; // initial stack size
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Addr stack_min; // lowest address accessed on the stack
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// addr to use for next stack region (for multithreaded apps)
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Addr next_thread_stack_base;
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std::string prog_fname; // file name
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Addr prog_entry; // entry point (initial PC)
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Statistics::Scalar<> num_syscalls; // number of syscalls executed
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protected:
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// constructor
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Process(const std::string &name,
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int stdin_fd, // initial I/O descriptors
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int stdout_fd,
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int stderr_fd);
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protected:
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FunctionalMemory *memory;
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private:
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// file descriptor remapping support
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static const int MAX_FD = 100; // max legal fd value
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int fd_map[MAX_FD+1];
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public:
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// static helper functions to generate file descriptors for constructor
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static int openInputFile(const std::string &filename);
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static int openOutputFile(const std::string &filename);
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// override of virtual SimObject method: register statistics
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virtual void regStats();
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// register an execution context for this process
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void registerExecContext(ExecContext *);
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// map simulator fd sim_fd to target fd tgt_fd
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void dup_fd(int sim_fd, int tgt_fd);
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// generate new target fd for sim_fd
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int open_fd(int sim_fd);
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// look up simulator fd for given target fd
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int sim_fd(int tgt_fd);
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// is this a valid instruction fetch address?
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bool validInstAddr(Addr addr)
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{
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return (text_base <= addr &&
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addr < text_base + text_size &&
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!(addr & (sizeof(MachInst)-1)));
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}
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// is this a valid address? (used to filter data fetches)
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// note that we just assume stack size <= 16MB
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// this may be alpha-specific
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bool validDataAddr(Addr addr)
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{
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return ((data_base <= addr && addr < brk_point) ||
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((stack_base - 16*1024*1024) <= addr && addr < stack_base) ||
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(text_base <= addr && addr < (text_base + text_size)));
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}
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virtual void syscall(ExecContext *xc) = 0;
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virtual FunctionalMemory *getMemory() { return memory; }
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};
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//
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// "Live" process with system calls redirected to host system
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//
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class MainMemory;
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class LiveProcess : public Process
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{
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public:
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LiveProcess(const std::string &name,
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int stdin_fd, int stdout_fd, int stderr_fd,
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std::vector<std::string> &argv,
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std::vector<std::string> &envp);
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virtual void syscall(ExecContext *xc);
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};
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#endif // !FULL_SYSTEM
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#endif // __PROG_HH__
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