gem5/cpu/pc_event.hh
Steve Reinhardt 25693e9e69 Make include paths explicit and update makefile accordingly.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/fake_syscall.cc:
arch/alpha/faults.cc:
arch/alpha/isa_desc:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
base/circlebuf.cc:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/cprintf.cc:
base/cprintf.hh:
base/fast_alloc.cc:
base/fifo_buffer.cc:
base/fifo_buffer.hh:
base/hashmap.hh:
base/hostinfo.cc:
base/hostinfo.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inet.hh:
base/inifile.cc:
base/inifile.hh:
base/intmath.cc:
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/exec_aout.h:
base/loader/exec_ecoff.h:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/misc.cc:
base/misc.hh:
base/pollevent.cc:
base/pollevent.hh:
base/random.cc:
base/random.hh:
base/range.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/socket.cc:
base/statistics.cc:
base/statistics.hh:
base/str.cc:
base/trace.cc:
base/trace.hh:
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/exetrace.hh:
cpu/intr_control.cc:
cpu/intr_control.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/static_inst.cc:
cpu/static_inst.hh:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.cc:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/simple_disk.cc:
dev/simple_disk.hh:
kern/tru64/tru64_syscalls.cc:
kern/tru64/tru64_syscalls.hh:
sim/debug.cc:
sim/eventq.cc:
sim/eventq.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/prog.cc:
sim/prog.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_object.cc:
sim/sim_object.hh:
sim/sim_time.cc:
sim/system.cc:
sim/system.hh:
sim/universe.cc:
test/circletest.cc:
test/cprintftest.cc:
test/initest.cc:
test/nmtest.cc:
test/offtest.cc:
test/paramtest.cc:
test/rangetest.cc:
test/stattest.cc:
test/strnumtest.cc:
test/symtest.cc:
test/tokentest.cc:
test/tracetest.cc:
util/tap/tap.cc:
    Make include paths explicit.

--HG--
extra : convert_revision : 941cbdc591fd4d3d1d9f095cd58fc23dd2d73840
2003-10-10 11:09:00 -07:00

215 lines
5.4 KiB
C++

/*
* Copyright (c) 2003 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __PC_EVENT_HH__
#define __PC_EVENT_HH__
#include <vector>
#include "targetarch/mem_req.hh"
class ExecContext;
class PCEventQueue;
class PCEvent
{
protected:
static const Addr badpc = MemReq::inval_addr;
protected:
std::string description;
PCEventQueue *queue;
Addr evpc;
public:
PCEvent() : queue(0), evpc(badpc) { }
PCEvent(const std::string &desc)
: description(desc), queue(0), evpc(badpc) { }
PCEvent(PCEventQueue *q, Addr pc = badpc) : queue(q), evpc(pc) { }
PCEvent(PCEventQueue *q, const std::string &desc, Addr pc = badpc)
: description(desc), queue(q), evpc(pc) { }
virtual ~PCEvent() { if (queue) remove(); }
std::string descr() const { return description; }
Addr pc() const { return evpc; }
bool remove();
bool schedule();
bool schedule(Addr pc);
bool schedule(PCEventQueue *q, Addr pc);
virtual void process(ExecContext *xc) = 0;
};
class PCEventQueue
{
protected:
typedef PCEvent * record_t;
class MapCompare {
public:
bool operator()(const record_t &l, const record_t &r) const {
return l->pc() < r->pc();
}
bool operator()(const record_t &l, Addr pc) const {
return l->pc() < pc;
}
bool operator()(Addr pc, const record_t &r) const {
return pc < r->pc();
}
};
typedef std::vector<record_t> map_t;
public:
typedef map_t::iterator iterator;
typedef map_t::const_iterator const_iterator;
protected:
typedef std::pair<iterator, iterator> range_t;
typedef std::pair<const_iterator, const_iterator> const_range_t;
protected:
map_t pc_map;
public:
PCEventQueue();
~PCEventQueue();
bool remove(PCEvent *event);
bool schedule(PCEvent *event);
bool service(ExecContext *xc);
range_t equal_range(Addr pc);
range_t equal_range(PCEvent *event) { return equal_range(event->pc()); }
void dump() const;
};
inline bool
PCEvent::remove()
{
if (!queue)
panic("cannot remove an uninitialized event;");
return queue->remove(this);
}
inline bool
PCEvent::schedule()
{
if (!queue || evpc == badpc)
panic("cannot schedule an uninitialized event;");
return queue->schedule(this);
}
inline bool
PCEvent::schedule(Addr pc)
{
if (evpc != badpc)
panic("cannot switch PC");
evpc = pc;
return schedule();
}
inline bool
PCEvent::schedule(PCEventQueue *q, Addr pc)
{
if (queue)
panic("cannot switch event queues");
if (evpc != badpc)
panic("cannot switch addresses");
queue = q;
evpc = pc;
return schedule();
}
#ifdef FULL_SYSTEM
class SkipFuncEvent : public PCEvent
{
public:
SkipFuncEvent(PCEventQueue *q, const std::string &desc)
: PCEvent(q, desc) {}
virtual void process(ExecContext *xc);
};
class BadAddrEvent : public SkipFuncEvent
{
public:
BadAddrEvent(PCEventQueue *q, const std::string &desc)
: SkipFuncEvent(q, desc) {}
virtual void process(ExecContext *xc);
};
class PrintfEvent : public PCEvent
{
public:
PrintfEvent(PCEventQueue *q, const std::string &desc)
: PCEvent(q, desc) {}
virtual void process(ExecContext *xc);
};
class DebugPrintfEvent : public PCEvent
{
private:
bool raw;
public:
DebugPrintfEvent(PCEventQueue *q, const std::string &desc, bool r = false)
: PCEvent(q, desc), raw(r) {}
virtual void process(ExecContext *xc);
};
class DumpMbufEvent : public PCEvent
{
public:
DumpMbufEvent(PCEventQueue *q, const std::string &desc)
: PCEvent(q, desc) {}
virtual void process(ExecContext *xc);
};
#endif
class BreakPCEvent : public PCEvent
{
protected:
bool remove;
public:
BreakPCEvent(PCEventQueue *q, const std::string &desc, bool del = false);
virtual void process(ExecContext *xc);
};
#endif // __PC_EVENT_HH__