274 lines
12 KiB
Text
274 lines
12 KiB
Text
Real time: Mar/06/2013 20:31:07
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Profiler Stats
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--------------
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Elapsed_time_in_seconds: 0
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Elapsed_time_in_minutes: 0
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Elapsed_time_in_hours: 0
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Elapsed_time_in_days: 0
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Virtual_time_in_seconds: 0.51
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Virtual_time_in_minutes: 0.0085
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Virtual_time_in_hours: 0.000141667
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Virtual_time_in_days: 5.90278e-06
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Ruby_current_time: 52498
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Ruby_start_time: 0
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Ruby_cycles: 52498
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mbytes_resident: 53.0938
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mbytes_total: 145.422
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resident_ratio: 0.365182
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ruby_cycles_executed: [ 52499 ]
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Busy Controller Counts:
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L1Cache-0:0
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Directory-0:0
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Busy Bank Count:0
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sequencer_requests_outstanding: [binsize: 1 max: 1 count: 3295 average: 1 | standard deviation: 0 | 0 3295 ]
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All Non-Zero Cycle Demand Cache Accesses
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----------------------------------------
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miss_latency: [binsize: 1 max: 94 count: 3294 average: 14.9375 | standard deviation: 24.8042 | 0 0 0 2668 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 1 0 0 4 7 128 221 203 1 2 1 2 7 11 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 4 18 11 0 1 ]
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miss_latency_LD: [binsize: 1 max: 92 count: 415 average: 40.3325 | standard deviation: 31.5967 | 0 0 0 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 4 44 94 74 0 2 0 1 2 5 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 1 9 6 ]
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miss_latency_ST: [binsize: 1 max: 92 count: 294 average: 20.9456 | standard deviation: 28.6341 | 0 0 0 210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 16 31 29 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 1 ]
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miss_latency_IFETCH: [binsize: 1 max: 94 count: 2585 average: 10.1772 | standard deviation: 20.0197 | 0 0 0 2288 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 4 3 68 96 100 1 0 0 1 5 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 6 4 0 1 ]
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miss_latency_L1Cache: [binsize: 1 max: 3 count: 2668 average: 3 | standard deviation: 0 | 0 0 0 2668 ]
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miss_latency_Directory: [binsize: 1 max: 94 count: 626 average: 65.8147 | standard deviation: 6.37759 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 1 0 0 4 7 128 221 203 1 2 1 2 7 11 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 4 18 11 0 1 ]
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miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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imcomplete_wCC_Times: 0
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miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ]
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miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ]
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miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ]
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miss_latency_dir_first_response_to_completion: [binsize: 1 max: 61 count: 1 average: 61 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
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imcomplete_dir_Times: 625
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miss_latency_LD_L1Cache: [binsize: 1 max: 3 count: 170 average: 3 | standard deviation: 0 | 0 0 0 170 ]
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miss_latency_LD_Directory: [binsize: 1 max: 92 count: 245 average: 66.2367 | standard deviation: 7.0079 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 4 44 94 74 0 2 0 1 2 5 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 1 9 6 ]
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miss_latency_ST_L1Cache: [binsize: 1 max: 3 count: 210 average: 3 | standard deviation: 0 | 0 0 0 210 ]
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miss_latency_ST_Directory: [binsize: 1 max: 92 count: 84 average: 65.8095 | standard deviation: 6.52244 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 16 31 29 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 1 ]
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miss_latency_IFETCH_L1Cache: [binsize: 1 max: 3 count: 2288 average: 3 | standard deviation: 0 | 0 0 0 2288 ]
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miss_latency_IFETCH_Directory: [binsize: 1 max: 94 count: 297 average: 65.468 | standard deviation: 5.76218 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 4 3 68 96 100 1 0 0 1 5 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 6 4 0 1 ]
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All Non-Zero Cycle SW Prefetch Requests
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------------------------------------
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prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Request vs. RubySystem State Profile
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--------------------------------
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filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Message Delayed Cycles
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----------------------
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Total_delay_cycles: [binsize: 1 max: 0 count: 1248 average: 0 | standard deviation: 0 | 1248 ]
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virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 626 average: 0 | standard deviation: 0 | 626 ]
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virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 622 average: 0 | standard deviation: 0 | 622 ]
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virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Resource Usage
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--------------
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page_size: 4096
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user_time: 0
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system_time: 0
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page_reclaims: 10892
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page_faults: 0
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swaps: 0
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block_inputs: 1328
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block_outputs: 88
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Network Stats
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-------------
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total_msg_count_Control: 1878 15024
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total_msg_count_Data: 1866 134352
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total_msg_count_Response_Data: 1878 135216
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total_msg_count_Writeback_Control: 1866 14928
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total_msgs: 7488 total_bytes: 299520
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switch_0_inlinks: 2
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switch_0_outlinks: 2
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links_utilized_percent_switch_0: 5.94308
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links_utilized_percent_switch_0_link_0: 5.95832 bw: 16000 base_latency: 1
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links_utilized_percent_switch_0_link_1: 5.92784 bw: 16000 base_latency: 1
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outgoing_messages_switch_0_link_0_Response_Data: 626 45072 [ 0 0 0 0 626 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_Writeback_Control: 622 4976 [ 0 0 0 622 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Control: 626 5008 [ 0 0 626 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Data: 622 44784 [ 0 0 622 0 0 0 0 0 0 0 ] base_latency: 1
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switch_1_inlinks: 2
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switch_1_outlinks: 2
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links_utilized_percent_switch_1: 5.94308
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links_utilized_percent_switch_1_link_0: 5.92784 bw: 16000 base_latency: 1
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links_utilized_percent_switch_1_link_1: 5.95832 bw: 16000 base_latency: 1
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outgoing_messages_switch_1_link_0_Control: 626 5008 [ 0 0 626 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_0_Data: 622 44784 [ 0 0 622 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_1_Response_Data: 626 45072 [ 0 0 0 0 626 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_1_Writeback_Control: 622 4976 [ 0 0 0 622 0 0 0 0 0 0 ] base_latency: 1
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switch_2_inlinks: 2
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switch_2_outlinks: 2
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links_utilized_percent_switch_2: 5.94308
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links_utilized_percent_switch_2_link_0: 5.95832 bw: 16000 base_latency: 1
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links_utilized_percent_switch_2_link_1: 5.92784 bw: 16000 base_latency: 1
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outgoing_messages_switch_2_link_0_Response_Data: 626 45072 [ 0 0 0 0 626 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_0_Writeback_Control: 622 4976 [ 0 0 0 622 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_1_Control: 626 5008 [ 0 0 626 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_1_Data: 622 44784 [ 0 0 622 0 0 0 0 0 0 0 ] base_latency: 1
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Cache Stats: system.ruby.l1_cntrl0.cacheMemory
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system.ruby.l1_cntrl0.cacheMemory_total_misses: 626
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system.ruby.l1_cntrl0.cacheMemory_total_demand_misses: 626
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system.ruby.l1_cntrl0.cacheMemory_total_prefetches: 0
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system.ruby.l1_cntrl0.cacheMemory_total_sw_prefetches: 0
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system.ruby.l1_cntrl0.cacheMemory_total_hw_prefetches: 0
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system.ruby.l1_cntrl0.cacheMemory_request_type_LD: 39.1374%
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system.ruby.l1_cntrl0.cacheMemory_request_type_ST: 13.4185%
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system.ruby.l1_cntrl0.cacheMemory_request_type_IFETCH: 47.4441%
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system.ruby.l1_cntrl0.cacheMemory_access_mode_type_Supervisor: 626 100%
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--- L1Cache ---
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- Event Counts -
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Load [415 ] 415
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Ifetch [2585 ] 2585
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Store [294 ] 294
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Data [626 ] 626
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Fwd_GETX [0 ] 0
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Inv [0 ] 0
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Replacement [622 ] 622
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Writeback_Ack [622 ] 622
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Writeback_Nack [0 ] 0
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- Transitions -
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I Load [245 ] 245
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I Ifetch [297 ] 297
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I Store [84 ] 84
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I Inv [0 ] 0
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I Replacement [0 ] 0
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II Writeback_Nack [0 ] 0
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M Load [170 ] 170
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M Ifetch [2288 ] 2288
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M Store [210 ] 210
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M Fwd_GETX [0 ] 0
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M Inv [0 ] 0
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M Replacement [622 ] 622
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MI Fwd_GETX [0 ] 0
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MI Inv [0 ] 0
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MI Writeback_Ack [622 ] 622
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MI Writeback_Nack [0 ] 0
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MII Fwd_GETX [0 ] 0
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IS Data [542 ] 542
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IM Data [84 ] 84
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Memory controller: system.ruby.dir_cntrl0.memBuffer:
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memory_total_requests: 1248
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memory_reads: 626
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memory_writes: 622
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memory_refreshes: 365
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memory_total_request_delays: 915
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memory_delays_per_request: 0.733173
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memory_delays_in_input_queue: 0
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memory_delays_behind_head_of_bank_queue: 0
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memory_delays_stalled_at_head_of_bank_queue: 915
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memory_stalls_for_bank_busy: 352
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memory_stalls_for_random_busy: 0
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memory_stalls_for_anti_starvation: 0
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memory_stalls_for_arbitration: 40
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memory_stalls_for_bus: 497
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memory_stalls_for_tfaw: 0
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memory_stalls_for_read_write_turnaround: 26
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memory_stalls_for_read_read_turnaround: 0
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accesses_per_bank: 55 40 0 100 42 42 88 45 14 10 14 10 46 82 38 6 22 14 14 48 20 52 26 92 34 10 12 24 28 44 38 138
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--- Directory ---
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- Event Counts -
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GETX [626 ] 626
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GETS [0 ] 0
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PUTX [622 ] 622
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PUTX_NotOwner [0 ] 0
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DMA_READ [0 ] 0
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DMA_WRITE [0 ] 0
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Memory_Data [626 ] 626
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Memory_Ack [622 ] 622
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- Transitions -
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I GETX [626 ] 626
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I PUTX_NotOwner [0 ] 0
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I DMA_READ [0 ] 0
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I DMA_WRITE [0 ] 0
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M GETX [0 ] 0
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M PUTX [622 ] 622
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M PUTX_NotOwner [0 ] 0
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M DMA_READ [0 ] 0
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M DMA_WRITE [0 ] 0
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M_DRD GETX [0 ] 0
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M_DRD PUTX [0 ] 0
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M_DWR GETX [0 ] 0
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M_DWR PUTX [0 ] 0
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M_DWRI GETX [0 ] 0
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M_DWRI Memory_Ack [0 ] 0
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M_DRDI GETX [0 ] 0
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M_DRDI Memory_Ack [0 ] 0
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IM GETX [0 ] 0
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IM GETS [0 ] 0
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IM PUTX [0 ] 0
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IM PUTX_NotOwner [0 ] 0
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IM DMA_READ [0 ] 0
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IM DMA_WRITE [0 ] 0
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IM Memory_Data [626 ] 626
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MI GETX [0 ] 0
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MI GETS [0 ] 0
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MI PUTX [0 ] 0
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MI PUTX_NotOwner [0 ] 0
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MI DMA_READ [0 ] 0
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MI DMA_WRITE [0 ] 0
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MI Memory_Ack [622 ] 622
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ID GETX [0 ] 0
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ID GETS [0 ] 0
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ID PUTX [0 ] 0
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ID PUTX_NotOwner [0 ] 0
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ID DMA_READ [0 ] 0
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ID DMA_WRITE [0 ] 0
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ID Memory_Data [0 ] 0
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ID_W GETX [0 ] 0
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ID_W GETS [0 ] 0
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ID_W PUTX [0 ] 0
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ID_W PUTX_NotOwner [0 ] 0
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ID_W DMA_READ [0 ] 0
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ID_W DMA_WRITE [0 ] 0
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ID_W Memory_Ack [0 ] 0
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