Nathan Binkert e9288b2cd3 scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access		2009-09-22 15:24:16 -07:00
..
alpha	Syscalls: Implement sysinfo() syscall.	2009-09-15 22:36:47 -07:00
arm	Syscalls: Implement sysinfo() syscall.	2009-09-15 22:36:47 -07:00
mips	python: Move more code into m5.util allow SCons to use that code.	2009-09-22 15:24:16 -07:00
sparc	Syscalls: Implement sysinfo() syscall.	2009-09-15 22:36:47 -07:00
x86	python: Move more code into m5.util allow SCons to use that code.	2009-09-22 15:24:16 -07:00
isa_parser.py	scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access	2009-09-22 15:24:16 -07:00
isa_specific.hh	style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs	2008-09-10 14:26:15 -04:00
micro_asm.py	scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access	2009-09-22 15:24:16 -07:00
micro_asm_test.py	Add a second section to make sure the ROM is extended properly.	2007-05-31 22:21:21 +00:00
SConscript	Registers: Add a registers.hh file as an ISA switched header.	2009-07-08 23:02:21 -07:00