859 lines
30 KiB
JSON
859 lines
30 KiB
JSON
{
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"name": null,
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"sim_quantum": 0,
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"system": {
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"kernel": "",
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"kernel_addr_check": true,
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"rom": {
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"range": "1099243192320:1099251580927",
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"latency": 60,
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"name": "rom",
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"eventq_index": 0,
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"clk_domain": "system.clk_domain",
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"latency_var": 0,
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"bandwidth": "0.000000",
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"conf_table_reported": true,
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"cxx_class": "SimpleMemory",
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"path": "system.rom",
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"null": false,
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"type": "SimpleMemory",
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"port": {
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"peer": "system.membus.master[3]",
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"role": "SLAVE"
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},
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"in_addr_map": true
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},
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"bridge": {
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"ranges": [
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"133412421632:133412421639",
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"134217728000:554050781183",
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"644245094400:652835028991",
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"725849473024:1095485095935",
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"1099255955456:1099255955463"
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],
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"slave": {
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"peer": "system.membus.master[2]",
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"role": "SLAVE"
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},
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"name": "bridge",
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"req_size": 16,
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"clk_domain": "system.clk_domain",
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"delay": 100,
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"eventq_index": 0,
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"master": {
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"peer": "system.iobus.slave[0]",
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"role": "MASTER"
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},
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"cxx_class": "Bridge",
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"path": "system.bridge",
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"resp_size": 16,
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"type": "Bridge"
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},
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"iobus": {
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"slave": {
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"peer": [
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"system.bridge.master"
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],
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"role": "SLAVE"
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},
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"name": "iobus",
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"clk_domain": "system.clk_domain",
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"header_cycles": 1,
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"width": 8,
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"eventq_index": 0,
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"master": {
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"peer": [
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"system.t1000.fake_clk.pio",
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"system.t1000.fake_membnks.pio",
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"system.t1000.fake_l2_1.pio",
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"system.t1000.fake_l2_2.pio",
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"system.t1000.fake_l2_3.pio",
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"system.t1000.fake_l2_4.pio",
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"system.t1000.fake_l2esr_1.pio",
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"system.t1000.fake_l2esr_2.pio",
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"system.t1000.fake_l2esr_3.pio",
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"system.t1000.fake_l2esr_4.pio",
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"system.t1000.fake_ssi.pio",
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"system.t1000.fake_jbi.pio",
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"system.t1000.puart0.pio",
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"system.t1000.hvuart.pio",
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"system.disk0.pio"
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],
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"role": "MASTER"
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},
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"cxx_class": "NoncoherentXBar",
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"path": "system.iobus",
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"type": "NoncoherentXBar",
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"use_default_range": false
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},
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"t1000": {
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"htod": {
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"name": "htod",
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"pio": {
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"peer": "system.membus.master[1]",
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"role": "SLAVE"
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},
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"time": "Thu Jan 1 00:00:00 2009",
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"pio_latency": 200,
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"clk_domain": "system.clk_domain",
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"system": "system",
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"eventq_index": 0,
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"cxx_class": "DumbTOD",
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"path": "system.t1000.htod",
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"pio_addr": 1099255906296,
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"type": "DumbTOD"
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},
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"puart0": {
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"name": "puart0",
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"pio": {
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"peer": "system.iobus.master[12]",
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"role": "SLAVE"
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},
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"pio_latency": 200,
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"clk_domain": "system.clk_domain",
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"system": "system",
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"terminal": "system.t1000.pterm",
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"platform": "system.t1000",
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"eventq_index": 0,
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"cxx_class": "Uart8250",
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"path": "system.t1000.puart0",
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"pio_addr": 133412421632,
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"type": "Uart8250"
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},
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"fake_membnks": {
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"system": "system",
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"ret_data8": 255,
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"name": "fake_membnks",
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"warn_access": "",
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"pio": {
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"peer": "system.iobus.master[1]",
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"role": "SLAVE"
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},
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"ret_bad_addr": false,
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"pio_latency": 200,
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"clk_domain": "system.clk_domain",
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"fake_mem": false,
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"pio_size": 16384,
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"ret_data32": 4294967295,
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"eventq_index": 0,
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"update_data": false,
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"ret_data64": 0,
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"cxx_class": "IsaFake",
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"path": "system.t1000.fake_membnks",
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"pio_addr": 648540061696,
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"type": "IsaFake",
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"ret_data16": 65535
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},
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"cxx_class": "T1000",
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"fake_jbi": {
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"system": "system",
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"ret_data8": 255,
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"name": "fake_jbi",
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"warn_access": "",
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"pio": {
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"peer": "system.iobus.master[11]",
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"role": "SLAVE"
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},
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"ret_bad_addr": false,
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"pio_latency": 200,
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"clk_domain": "system.clk_domain",
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"fake_mem": false,
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"pio_size": 4294967296,
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"ret_data32": 4294967295,
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"eventq_index": 0,
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"update_data": false,
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"ret_data64": 18446744073709551615,
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"cxx_class": "IsaFake",
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"path": "system.t1000.fake_jbi",
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"pio_addr": 549755813888,
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"type": "IsaFake",
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"ret_data16": 65535
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},
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"intrctrl": "system.intrctrl",
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"fake_l2esr_2": {
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"system": "system",
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"ret_data8": 255,
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"name": "fake_l2esr_2",
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"warn_access": "",
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"pio": {
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"peer": "system.iobus.master[7]",
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"role": "SLAVE"
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},
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"ret_bad_addr": false,
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"pio_latency": 200,
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"clk_domain": "system.clk_domain",
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"fake_mem": false,
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"pio_size": 8,
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"ret_data32": 4294967295,
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"eventq_index": 0,
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"update_data": true,
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"ret_data64": 0,
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"cxx_class": "IsaFake",
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"path": "system.t1000.fake_l2esr_2",
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"pio_addr": 734439407680,
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"type": "IsaFake",
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"ret_data16": 65535
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},
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"system": "system",
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"eventq_index": 0,
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"hterm": {
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"name": "hterm",
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"output": true,
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"number": 0,
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"intr_control": "system.intrctrl",
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"eventq_index": 0,
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"cxx_class": "Terminal",
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"path": "system.t1000.hterm",
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"type": "Terminal",
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"port": 3456
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},
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"type": "T1000",
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"fake_l2_4": {
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"system": "system",
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"ret_data8": 255,
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"name": "fake_l2_4",
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"warn_access": "",
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"pio": {
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"peer": "system.iobus.master[5]",
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"role": "SLAVE"
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},
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"ret_bad_addr": false,
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"pio_latency": 200,
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"clk_domain": "system.clk_domain",
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"fake_mem": false,
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"pio_size": 8,
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"ret_data32": 4294967295,
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"eventq_index": 0,
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"update_data": true,
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"ret_data64": 1,
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"cxx_class": "IsaFake",
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"path": "system.t1000.fake_l2_4",
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"pio_addr": 725849473216,
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"type": "IsaFake",
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"ret_data16": 65535
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},
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"fake_l2_1": {
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"system": "system",
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"ret_data8": 255,
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"name": "fake_l2_1",
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"warn_access": "",
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"pio": {
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"peer": "system.iobus.master[2]",
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"role": "SLAVE"
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},
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"ret_bad_addr": false,
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"pio_latency": 200,
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"clk_domain": "system.clk_domain",
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"fake_mem": false,
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"pio_size": 8,
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"ret_data32": 4294967295,
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"eventq_index": 0,
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"update_data": true,
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"ret_data64": 1,
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"cxx_class": "IsaFake",
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"path": "system.t1000.fake_l2_1",
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"pio_addr": 725849473024,
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"type": "IsaFake",
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"ret_data16": 65535
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},
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"fake_l2_2": {
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"system": "system",
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"ret_data8": 255,
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"name": "fake_l2_2",
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"warn_access": "",
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"pio": {
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"peer": "system.iobus.master[3]",
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"role": "SLAVE"
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},
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"ret_bad_addr": false,
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"pio_latency": 200,
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"clk_domain": "system.clk_domain",
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"fake_mem": false,
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"pio_size": 8,
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"ret_data32": 4294967295,
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"eventq_index": 0,
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"update_data": true,
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"ret_data64": 1,
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"cxx_class": "IsaFake",
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"path": "system.t1000.fake_l2_2",
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"pio_addr": 725849473088,
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"type": "IsaFake",
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"ret_data16": 65535
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},
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"fake_l2_3": {
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"system": "system",
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"ret_data8": 255,
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"name": "fake_l2_3",
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"warn_access": "",
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"pio": {
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"peer": "system.iobus.master[4]",
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"role": "SLAVE"
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},
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"ret_bad_addr": false,
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"pio_latency": 200,
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"clk_domain": "system.clk_domain",
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"fake_mem": false,
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"pio_size": 8,
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"ret_data32": 4294967295,
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"eventq_index": 0,
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"update_data": true,
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"ret_data64": 1,
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"cxx_class": "IsaFake",
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"path": "system.t1000.fake_l2_3",
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"pio_addr": 725849473152,
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"type": "IsaFake",
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"ret_data16": 65535
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},
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"pterm": {
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"name": "pterm",
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"output": true,
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"number": 0,
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"intr_control": "system.intrctrl",
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"eventq_index": 0,
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"cxx_class": "Terminal",
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"path": "system.t1000.pterm",
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"type": "Terminal",
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"port": 3456
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},
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"path": "system.t1000",
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"iob": {
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"name": "iob",
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"pio": {
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"peer": "system.membus.master[0]",
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"role": "SLAVE"
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},
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"pio_latency": 2,
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"clk_domain": "system.clk_domain",
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"system": "system",
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"platform": "system.t1000",
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"eventq_index": 0,
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"cxx_class": "Iob",
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"path": "system.t1000.iob",
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"type": "Iob"
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},
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"hvuart": {
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"name": "hvuart",
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"pio": {
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"peer": "system.iobus.master[13]",
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"role": "SLAVE"
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},
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"pio_latency": 200,
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"clk_domain": "system.clk_domain",
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"system": "system",
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"terminal": "system.t1000.hterm",
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"platform": "system.t1000",
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"eventq_index": 0,
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"cxx_class": "Uart8250",
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"path": "system.t1000.hvuart",
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"pio_addr": 1099255955456,
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"type": "Uart8250"
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},
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"name": "t1000",
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"fake_l2esr_3": {
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"system": "system",
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"ret_data8": 255,
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"name": "fake_l2esr_3",
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"warn_access": "",
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"pio": {
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"peer": "system.iobus.master[8]",
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"role": "SLAVE"
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},
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"ret_bad_addr": false,
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"pio_latency": 200,
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"clk_domain": "system.clk_domain",
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"fake_mem": false,
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"pio_size": 8,
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"ret_data32": 4294967295,
|
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"eventq_index": 0,
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"update_data": true,
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"ret_data64": 0,
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"cxx_class": "IsaFake",
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"path": "system.t1000.fake_l2esr_3",
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"pio_addr": 734439407744,
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"type": "IsaFake",
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"ret_data16": 65535
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},
|
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"fake_ssi": {
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"system": "system",
|
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"ret_data8": 255,
|
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"name": "fake_ssi",
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"warn_access": "",
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"pio": {
|
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"peer": "system.iobus.master[10]",
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"role": "SLAVE"
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},
|
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"ret_bad_addr": false,
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"pio_latency": 200,
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"clk_domain": "system.clk_domain",
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"fake_mem": false,
|
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"pio_size": 268435456,
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"ret_data32": 4294967295,
|
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"eventq_index": 0,
|
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"update_data": false,
|
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"ret_data64": 18446744073709551615,
|
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"cxx_class": "IsaFake",
|
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"path": "system.t1000.fake_ssi",
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"pio_addr": 1095216660480,
|
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"type": "IsaFake",
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"ret_data16": 65535
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},
|
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"fake_l2esr_1": {
|
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"system": "system",
|
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"ret_data8": 255,
|
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"name": "fake_l2esr_1",
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"warn_access": "",
|
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"pio": {
|
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"peer": "system.iobus.master[6]",
|
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"role": "SLAVE"
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},
|
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"ret_bad_addr": false,
|
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"pio_latency": 200,
|
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"clk_domain": "system.clk_domain",
|
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"fake_mem": false,
|
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"pio_size": 8,
|
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"ret_data32": 4294967295,
|
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"eventq_index": 0,
|
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"update_data": true,
|
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"ret_data64": 0,
|
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"cxx_class": "IsaFake",
|
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"path": "system.t1000.fake_l2esr_1",
|
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"pio_addr": 734439407616,
|
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"type": "IsaFake",
|
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"ret_data16": 65535
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},
|
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"fake_l2esr_4": {
|
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"system": "system",
|
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"ret_data8": 255,
|
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"name": "fake_l2esr_4",
|
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"warn_access": "",
|
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"pio": {
|
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"peer": "system.iobus.master[9]",
|
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"role": "SLAVE"
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},
|
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"ret_bad_addr": false,
|
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"pio_latency": 200,
|
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"clk_domain": "system.clk_domain",
|
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"fake_mem": false,
|
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"pio_size": 8,
|
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"ret_data32": 4294967295,
|
|
"eventq_index": 0,
|
|
"update_data": true,
|
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"ret_data64": 0,
|
|
"cxx_class": "IsaFake",
|
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"path": "system.t1000.fake_l2esr_4",
|
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"pio_addr": 734439407808,
|
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"type": "IsaFake",
|
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"ret_data16": 65535
|
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},
|
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"fake_clk": {
|
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"system": "system",
|
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"ret_data8": 255,
|
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"name": "fake_clk",
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"warn_access": "",
|
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"pio": {
|
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"peer": "system.iobus.master[0]",
|
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"role": "SLAVE"
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},
|
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"ret_bad_addr": false,
|
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"pio_latency": 200,
|
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"clk_domain": "system.clk_domain",
|
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"fake_mem": false,
|
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"pio_size": 4294967296,
|
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"ret_data32": 4294967295,
|
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"eventq_index": 0,
|
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"update_data": false,
|
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"ret_data64": 18446744073709551615,
|
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"cxx_class": "IsaFake",
|
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"path": "system.t1000.fake_clk",
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"pio_addr": 644245094400,
|
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"type": "IsaFake",
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"ret_data16": 65535
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}
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},
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"symbolfile": "",
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"readfile": "/scratch/nilay/GEM5/gem5/tests/halt.sh",
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"hypervisor_addr": 1099243257856,
|
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"mem_ranges": [
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"1048576:68157439",
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"2147483648:2415919103"
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],
|
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"cxx_class": "SparcSystem",
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"load_offset": 0,
|
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"reset_bin": "/scratch/nilay/GEM5/system/binaries/reset_new.bin",
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"openboot_addr": 1099243716608,
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"work_end_ckpt_count": 0,
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"nvram_addr": 133429198848,
|
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"memories": [
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"system.nvram",
|
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"system.physmem1",
|
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"system.hypervisor_desc",
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"system.partition_desc",
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"system.physmem0",
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"system.rom"
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],
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"work_begin_ckpt_count": 0,
|
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"partition_desc": {
|
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"range": "133445976064:133445984255",
|
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"latency": 60,
|
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"name": "partition_desc",
|
|
"eventq_index": 0,
|
|
"clk_domain": "system.clk_domain",
|
|
"latency_var": 0,
|
|
"bandwidth": "0.000000",
|
|
"conf_table_reported": true,
|
|
"cxx_class": "SimpleMemory",
|
|
"path": "system.partition_desc",
|
|
"null": false,
|
|
"type": "SimpleMemory",
|
|
"port": {
|
|
"peer": "system.membus.master[6]",
|
|
"role": "SLAVE"
|
|
},
|
|
"in_addr_map": true
|
|
},
|
|
"clk_domain": {
|
|
"name": "clk_domain",
|
|
"clock": [
|
|
2
|
|
],
|
|
"init_perf_level": 0,
|
|
"voltage_domain": "system.voltage_domain",
|
|
"eventq_index": 0,
|
|
"cxx_class": "SrcClockDomain",
|
|
"path": "system.clk_domain",
|
|
"type": "SrcClockDomain",
|
|
"domain_id": -1
|
|
},
|
|
"hypervisor_desc": {
|
|
"range": "133446500352:133446508543",
|
|
"latency": 60,
|
|
"name": "hypervisor_desc",
|
|
"eventq_index": 0,
|
|
"clk_domain": "system.clk_domain",
|
|
"latency_var": 0,
|
|
"bandwidth": "0.000000",
|
|
"conf_table_reported": true,
|
|
"cxx_class": "SimpleMemory",
|
|
"path": "system.hypervisor_desc",
|
|
"null": false,
|
|
"type": "SimpleMemory",
|
|
"port": {
|
|
"peer": "system.membus.master[5]",
|
|
"role": "SLAVE"
|
|
},
|
|
"in_addr_map": true
|
|
},
|
|
"membus": {
|
|
"default": {
|
|
"peer": "system.membus.badaddr_responder.pio",
|
|
"role": "MASTER"
|
|
},
|
|
"slave": {
|
|
"peer": [
|
|
"system.system_port",
|
|
"system.cpu.icache_port",
|
|
"system.cpu.dcache_port"
|
|
],
|
|
"role": "SLAVE"
|
|
},
|
|
"name": "membus",
|
|
"badaddr_responder": {
|
|
"system": "system",
|
|
"ret_data8": 255,
|
|
"name": "badaddr_responder",
|
|
"warn_access": "",
|
|
"pio": {
|
|
"peer": "system.membus.default",
|
|
"role": "SLAVE"
|
|
},
|
|
"ret_bad_addr": true,
|
|
"pio_latency": 200,
|
|
"clk_domain": "system.clk_domain",
|
|
"fake_mem": false,
|
|
"pio_size": 8,
|
|
"ret_data32": 4294967295,
|
|
"eventq_index": 0,
|
|
"update_data": false,
|
|
"ret_data64": 18446744073709551615,
|
|
"cxx_class": "IsaFake",
|
|
"path": "system.membus.badaddr_responder",
|
|
"pio_addr": 0,
|
|
"type": "IsaFake",
|
|
"ret_data16": 65535
|
|
},
|
|
"snoop_filter": null,
|
|
"clk_domain": "system.clk_domain",
|
|
"header_cycles": 1,
|
|
"system": "system",
|
|
"width": 8,
|
|
"eventq_index": 0,
|
|
"master": {
|
|
"peer": [
|
|
"system.t1000.iob.pio",
|
|
"system.t1000.htod.pio",
|
|
"system.bridge.slave",
|
|
"system.rom.port",
|
|
"system.nvram.port",
|
|
"system.hypervisor_desc.port",
|
|
"system.partition_desc.port",
|
|
"system.physmem0.port",
|
|
"system.physmem1.port"
|
|
],
|
|
"role": "MASTER"
|
|
},
|
|
"cxx_class": "CoherentXBar",
|
|
"path": "system.membus",
|
|
"type": "CoherentXBar",
|
|
"use_default_range": false
|
|
},
|
|
"nvram": {
|
|
"range": "133429198848:133429207039",
|
|
"latency": 60,
|
|
"name": "nvram",
|
|
"eventq_index": 0,
|
|
"clk_domain": "system.clk_domain",
|
|
"latency_var": 0,
|
|
"bandwidth": "0.000000",
|
|
"conf_table_reported": true,
|
|
"cxx_class": "SimpleMemory",
|
|
"path": "system.nvram",
|
|
"null": false,
|
|
"type": "SimpleMemory",
|
|
"port": {
|
|
"peer": "system.membus.master[4]",
|
|
"role": "SLAVE"
|
|
},
|
|
"in_addr_map": true
|
|
},
|
|
"eventq_index": 0,
|
|
"work_begin_cpu_id_exit": -1,
|
|
"dvfs_handler": {
|
|
"enable": false,
|
|
"name": "dvfs_handler",
|
|
"sys_clk_domain": "system.clk_domain",
|
|
"transition_latency": 200000,
|
|
"eventq_index": 0,
|
|
"cxx_class": "DVFSHandler",
|
|
"domains": [],
|
|
"path": "system.dvfs_handler",
|
|
"type": "DVFSHandler"
|
|
},
|
|
"work_end_exit_count": 0,
|
|
"hypervisor_desc_bin": "/scratch/nilay/GEM5/system/binaries/1up-hv.bin",
|
|
"openboot_bin": "/scratch/nilay/GEM5/system/binaries/openboot_new.bin",
|
|
"voltage_domain": {
|
|
"name": "voltage_domain",
|
|
"eventq_index": 0,
|
|
"voltage": [
|
|
"1.0"
|
|
],
|
|
"cxx_class": "VoltageDomain",
|
|
"path": "system.voltage_domain",
|
|
"type": "VoltageDomain"
|
|
},
|
|
"cache_line_size": 64,
|
|
"boot_osflags": "a",
|
|
"system_port": {
|
|
"peer": "system.membus.slave[0]",
|
|
"role": "MASTER"
|
|
},
|
|
"physmem": [
|
|
{
|
|
"range": "1048576:68157439",
|
|
"latency": 60,
|
|
"name": "physmem0",
|
|
"eventq_index": 0,
|
|
"clk_domain": "system.clk_domain",
|
|
"latency_var": 0,
|
|
"bandwidth": "0.000000",
|
|
"conf_table_reported": true,
|
|
"cxx_class": "SimpleMemory",
|
|
"path": "system.physmem0",
|
|
"null": false,
|
|
"type": "SimpleMemory",
|
|
"port": {
|
|
"peer": "system.membus.master[7]",
|
|
"role": "SLAVE"
|
|
},
|
|
"in_addr_map": true
|
|
},
|
|
{
|
|
"range": "2147483648:2415919103",
|
|
"latency": 60,
|
|
"name": "physmem1",
|
|
"eventq_index": 0,
|
|
"clk_domain": "system.clk_domain",
|
|
"latency_var": 0,
|
|
"bandwidth": "0.000000",
|
|
"conf_table_reported": true,
|
|
"cxx_class": "SimpleMemory",
|
|
"path": "system.physmem1",
|
|
"null": false,
|
|
"type": "SimpleMemory",
|
|
"port": {
|
|
"peer": "system.membus.master[8]",
|
|
"role": "SLAVE"
|
|
},
|
|
"in_addr_map": true
|
|
}
|
|
],
|
|
"work_cpus_ckpt_count": 0,
|
|
"work_begin_exit_count": 0,
|
|
"path": "system",
|
|
"hypervisor_bin": "/scratch/nilay/GEM5/system/binaries/q_new.bin",
|
|
"cpu_clk_domain": {
|
|
"name": "cpu_clk_domain",
|
|
"clock": [
|
|
2
|
|
],
|
|
"init_perf_level": 0,
|
|
"voltage_domain": "system.voltage_domain",
|
|
"eventq_index": 0,
|
|
"cxx_class": "SrcClockDomain",
|
|
"path": "system.cpu_clk_domain",
|
|
"type": "SrcClockDomain",
|
|
"domain_id": -1
|
|
},
|
|
"nvram_bin": "/scratch/nilay/GEM5/system/binaries/nvram1",
|
|
"mem_mode": "atomic",
|
|
"name": "system",
|
|
"init_param": 0,
|
|
"type": "SparcSystem",
|
|
"partition_desc_bin": "/scratch/nilay/GEM5/system/binaries/1up-md.bin",
|
|
"load_addr_mask": 1099511627775,
|
|
"cpu": {
|
|
"do_statistics_insts": true,
|
|
"numThreads": 1,
|
|
"itb": {
|
|
"name": "itb",
|
|
"eventq_index": 0,
|
|
"cxx_class": "SparcISA::TLB",
|
|
"path": "system.cpu.itb",
|
|
"type": "SparcTLB",
|
|
"size": 64
|
|
},
|
|
"simulate_data_stalls": false,
|
|
"function_trace": false,
|
|
"do_checkpoint_insts": true,
|
|
"cxx_class": "AtomicSimpleCPU",
|
|
"max_loads_all_threads": 0,
|
|
"system": "system",
|
|
"clk_domain": "system.cpu_clk_domain",
|
|
"function_trace_start": 0,
|
|
"cpu_id": 0,
|
|
"width": 1,
|
|
"checker": null,
|
|
"eventq_index": 0,
|
|
"do_quiesce": true,
|
|
"type": "AtomicSimpleCPU",
|
|
"fastmem": false,
|
|
"profile": 0,
|
|
"icache_port": {
|
|
"peer": "system.membus.slave[1]",
|
|
"role": "MASTER"
|
|
},
|
|
"interrupts": {
|
|
"eventq_index": 0,
|
|
"path": "system.cpu.interrupts",
|
|
"type": "SparcInterrupts",
|
|
"name": "interrupts",
|
|
"cxx_class": "SparcISA::Interrupts"
|
|
},
|
|
"dcache_port": {
|
|
"peer": "system.membus.slave[2]",
|
|
"role": "MASTER"
|
|
},
|
|
"socket_id": 0,
|
|
"max_insts_all_threads": 0,
|
|
"path": "system.cpu",
|
|
"max_loads_any_thread": 0,
|
|
"switched_out": false,
|
|
"workload": [],
|
|
"name": "cpu",
|
|
"dtb": {
|
|
"name": "dtb",
|
|
"eventq_index": 0,
|
|
"cxx_class": "SparcISA::TLB",
|
|
"path": "system.cpu.dtb",
|
|
"type": "SparcTLB",
|
|
"size": 64
|
|
},
|
|
"simpoint_start_insts": [],
|
|
"max_insts_any_thread": 0,
|
|
"simulate_inst_stalls": false,
|
|
"progress_interval": 0,
|
|
"branchPred": null,
|
|
"isa": [
|
|
{
|
|
"eventq_index": 0,
|
|
"path": "system.cpu.isa",
|
|
"type": "SparcISA",
|
|
"name": "isa",
|
|
"cxx_class": "SparcISA::ISA"
|
|
}
|
|
],
|
|
"tracer": {
|
|
"eventq_index": 0,
|
|
"path": "system.cpu.tracer",
|
|
"type": "ExeTracer",
|
|
"name": "tracer",
|
|
"cxx_class": "Trace::ExeTracer"
|
|
}
|
|
},
|
|
"intrctrl": {
|
|
"name": "intrctrl",
|
|
"sys": "system",
|
|
"eventq_index": 0,
|
|
"cxx_class": "IntrControl",
|
|
"path": "system.intrctrl",
|
|
"type": "IntrControl"
|
|
},
|
|
"disk0": {
|
|
"name": "disk0",
|
|
"pio": {
|
|
"peer": "system.iobus.master[14]",
|
|
"role": "SLAVE"
|
|
},
|
|
"image": {
|
|
"read_only": false,
|
|
"name": "image",
|
|
"cxx_class": "CowDiskImage",
|
|
"eventq_index": 0,
|
|
"child": {
|
|
"read_only": true,
|
|
"name": "child",
|
|
"eventq_index": 0,
|
|
"cxx_class": "RawDiskImage",
|
|
"path": "system.disk0.image.child",
|
|
"image_file": "/scratch/nilay/GEM5/system/disks/disk.s10hw2",
|
|
"type": "RawDiskImage"
|
|
},
|
|
"path": "system.disk0.image",
|
|
"image_file": "",
|
|
"type": "CowDiskImage",
|
|
"table_size": 65536
|
|
},
|
|
"pio_latency": 200,
|
|
"clk_domain": "system.clk_domain",
|
|
"system": "system",
|
|
"eventq_index": 0,
|
|
"cxx_class": "MmDisk",
|
|
"path": "system.disk0",
|
|
"pio_addr": 134217728000,
|
|
"type": "MmDisk"
|
|
},
|
|
"reset_addr": 1099243192320,
|
|
"hypervisor_desc_addr": 133446500352,
|
|
"partition_desc_addr": 133445976064,
|
|
"work_item_id": -1,
|
|
"num_work_ids": 16
|
|
},
|
|
"time_sync_period": 200000000,
|
|
"eventq_index": 0,
|
|
"time_sync_spin_threshold": 200000,
|
|
"cxx_class": "Root",
|
|
"path": "root",
|
|
"time_sync_enable": false,
|
|
"type": "Root",
|
|
"full_system": true
|
|
} |