214cc0fafc
Events need to be scheduled on the queue assigned to the SimObject, not on the global queue (which should be going away). Also cleaned up a number of redundant expressions that made the code unnecessarily verbose.
512 lines
13 KiB
C++
512 lines
13 KiB
C++
/*
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* Copyright (c) 2007 MIPS Technologies, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Korey Sewell
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*
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*/
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#include <vector>
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#include <list>
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#include "cpu/inorder/resource.hh"
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#include "cpu/inorder/cpu.hh"
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using namespace std;
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Resource::Resource(string res_name, int res_id, int res_width,
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int res_latency, InOrderCPU *_cpu)
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: resName(res_name), id(res_id),
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width(res_width), latency(res_latency), cpu(_cpu)
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{
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// Use to deny a instruction a resource.
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deniedReq = new ResourceRequest(this, NULL, 0, 0, 0, 0);
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}
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Resource::~Resource()
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{
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delete [] resourceEvent;
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delete deniedReq;
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}
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void
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Resource::init()
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{
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// Set Up Resource Events to Appropriate Resource BandWidth
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resourceEvent = new ResourceEvent[width];
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initSlots();
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}
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void
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Resource::initSlots()
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{
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// Add available slot numbers for resource
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for (int slot_idx = 0; slot_idx < width; slot_idx++) {
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availSlots.push_back(slot_idx);
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resourceEvent[slot_idx].init(this, slot_idx);
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}
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}
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std::string
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Resource::name()
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{
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return cpu->name() + "." + resName;
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}
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int
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Resource::slotsAvail()
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{
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return availSlots.size();
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}
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int
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Resource::slotsInUse()
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{
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return width - availSlots.size();
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}
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void
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Resource::freeSlot(int slot_idx)
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{
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// Put slot number on this resource's free list
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availSlots.push_back(slot_idx);
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// Erase Request Pointer From Request Map
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std::map<int, ResReqPtr>::iterator req_it = reqMap.find(slot_idx);
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assert(req_it != reqMap.end());
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reqMap.erase(req_it);
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}
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// TODO: More efficiently search for instruction's slot within
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// resource.
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int
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Resource::findSlot(DynInstPtr inst)
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{
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map<int, ResReqPtr>::iterator map_it = reqMap.begin();
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map<int, ResReqPtr>::iterator map_end = reqMap.end();
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int slot_num = -1;
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while (map_it != map_end) {
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if ((*map_it).second->getInst()->seqNum ==
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inst->seqNum) {
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slot_num = (*map_it).second->getSlot();
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}
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map_it++;
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}
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return slot_num;
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}
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int
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Resource::getSlot(DynInstPtr inst)
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{
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int slot_num;
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if (slotsAvail() != 0) {
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slot_num = availSlots[0];
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vector<int>::iterator vect_it = availSlots.begin();
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assert(slot_num == *vect_it);
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availSlots.erase(vect_it);
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} else {
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DPRINTF(Resource, "[tid:%i]: No slots in resource "
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"available to service [sn:%i].\n", inst->readTid(),
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inst->seqNum);
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slot_num = -1;
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map<int, ResReqPtr>::iterator map_it = reqMap.begin();
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map<int, ResReqPtr>::iterator map_end = reqMap.end();
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while (map_it != map_end) {
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if ((*map_it).second) {
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DPRINTF(Resource, "Currently Serving request from: "
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"[tid:%i] [sn:%i].\n",
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(*map_it).second->getInst()->readTid(),
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(*map_it).second->getInst()->seqNum);
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}
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map_it++;
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}
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}
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return slot_num;
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}
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ResReqPtr
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Resource::request(DynInstPtr inst)
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{
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// See if the resource is already serving this instruction.
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// If so, use that request;
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bool try_request = false;
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int slot_num = -1;
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int stage_num;
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ResReqPtr inst_req = findRequest(inst);
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if (inst_req) {
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// If some preprocessing has to be done on instruction
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// that has already requested once, then handle it here.
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// update the 'try_request' variable if we should
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// re-execute the request.
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requestAgain(inst, try_request);
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slot_num = inst_req->getSlot();
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stage_num = inst_req->getStageNum();
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} else {
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// Get new slot # for instruction
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slot_num = getSlot(inst);
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if (slot_num != -1) {
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// Get Stage # from Schedule Entry
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stage_num = inst->resSched.top()->stageNum;
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unsigned cmd = inst->resSched.top()->cmd;
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// Generate Resource Request
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inst_req = getRequest(inst, stage_num, id, slot_num, cmd);
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if (inst->staticInst) {
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DPRINTF(Resource, "[tid:%i]: [sn:%i] requesting this "
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"resource.\n",
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inst->readTid(), inst->seqNum);
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} else {
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DPRINTF(Resource, "[tid:%i]: instruction requesting this "
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"resource.\n",
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inst->readTid());
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}
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reqMap[slot_num] = inst_req;
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try_request = true;
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}
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}
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if (try_request) {
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// Schedule execution of resource
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scheduleExecution(slot_num);
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} else {
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inst_req = deniedReq;
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rejectRequest(inst);
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}
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return inst_req;
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}
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void
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Resource::requestAgain(DynInstPtr inst, bool &do_request)
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{
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do_request = true;
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if (inst->staticInst) {
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DPRINTF(Resource, "[tid:%i]: [sn:%i] requesting this resource "
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"again.\n",
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inst->readTid(), inst->seqNum);
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} else {
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DPRINTF(Resource, "[tid:%i]: requesting this resource again.\n",
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inst->readTid());
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}
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}
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ResReqPtr
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Resource::getRequest(DynInstPtr inst, int stage_num, int res_idx,
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int slot_num, unsigned cmd)
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{
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return new ResourceRequest(this, inst, stage_num, id, slot_num,
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cmd);
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}
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ResReqPtr
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Resource::findRequest(DynInstPtr inst)
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{
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map<int, ResReqPtr>::iterator map_it = reqMap.begin();
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map<int, ResReqPtr>::iterator map_end = reqMap.end();
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bool found = false;
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ResReqPtr req = NULL;
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while (map_it != map_end) {
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if ((*map_it).second &&
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(*map_it).second->getInst() == inst) {
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req = (*map_it).second;
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//return (*map_it).second;
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assert(found == false);
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found = true;
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}
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map_it++;
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}
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return req;
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//return NULL;
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}
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void
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Resource::rejectRequest(DynInstPtr inst)
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{
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DPRINTF(RefCount, "[tid:%i]: Unable to grant request for [sn:%i].\n",
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inst->readTid(), inst->seqNum);
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}
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void
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Resource::execute(int slot_idx)
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{
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DPRINTF(Resource, "[tid:%i]: Executing %s resource.\n",
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reqMap[slot_idx]->getTid(), name());
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reqMap[slot_idx]->setCompleted(true);
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reqMap[slot_idx]->fault = NoFault;
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reqMap[slot_idx]->done();
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}
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void
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Resource::deactivateThread(ThreadID tid)
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{
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// In the most basic case, deactivation means squashing everything
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// from a particular thread
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DynInstPtr dummy_inst = new InOrderDynInst(cpu, NULL, 0, tid, tid);
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squash(dummy_inst, 0, 0, tid);
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}
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void
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Resource::squash(DynInstPtr inst, int stage_num, InstSeqNum squash_seq_num,
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ThreadID tid)
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{
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std::vector<int> slot_remove_list;
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map<int, ResReqPtr>::iterator map_it = reqMap.begin();
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map<int, ResReqPtr>::iterator map_end = reqMap.end();
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while (map_it != map_end) {
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ResReqPtr req_ptr = (*map_it).second;
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if (req_ptr &&
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req_ptr->getInst()->readTid() == tid &&
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req_ptr->getInst()->seqNum > squash_seq_num) {
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DPRINTF(Resource, "[tid:%i]: Squashing [sn:%i].\n",
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req_ptr->getInst()->readTid(),
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req_ptr->getInst()->seqNum);
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req_ptr->setSquashed();
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int req_slot_num = req_ptr->getSlot();
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if (resourceEvent[req_slot_num].scheduled())
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unscheduleEvent(req_slot_num);
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// Mark request for later removal
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cpu->reqRemoveList.push(req_ptr);
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// Mark slot for removal from resource
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slot_remove_list.push_back(req_ptr->getSlot());
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}
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map_it++;
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}
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// Now Delete Slot Entry from Req. Map
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for (int i = 0; i < slot_remove_list.size(); i++) {
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freeSlot(slot_remove_list[i]);
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}
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}
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void
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Resource::squashDueToMemStall(DynInstPtr inst, int stage_num,
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InstSeqNum squash_seq_num,
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ThreadID tid)
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{
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squash(inst, stage_num, squash_seq_num, tid);
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}
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Tick
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Resource::ticks(int num_cycles)
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{
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return cpu->ticks(num_cycles);
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}
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void
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Resource::scheduleExecution(int slot_num)
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{
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int res_latency = getLatency(slot_num);
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if (res_latency >= 1) {
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scheduleEvent(slot_num, res_latency);
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} else {
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execute(slot_num);
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}
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}
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void
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Resource::scheduleEvent(int slot_idx, int delay)
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{
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DPRINTF(Resource, "[tid:%i]: Scheduling event for [sn:%i] on tick %i.\n",
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reqMap[slot_idx]->inst->readTid(),
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reqMap[slot_idx]->inst->seqNum,
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cpu->ticks(delay) + curTick);
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resourceEvent[slot_idx].scheduleEvent(delay);
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}
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bool
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Resource::scheduleEvent(DynInstPtr inst, int delay)
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{
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int slot_idx = findSlot(inst);
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if(slot_idx != -1)
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resourceEvent[slot_idx].scheduleEvent(delay);
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return slot_idx;
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}
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void
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Resource::unscheduleEvent(int slot_idx)
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{
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resourceEvent[slot_idx].unscheduleEvent();
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}
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bool
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Resource::unscheduleEvent(DynInstPtr inst)
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{
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int slot_idx = findSlot(inst);
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if(slot_idx != -1)
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resourceEvent[slot_idx].unscheduleEvent();
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return slot_idx;
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}
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int ResourceRequest::resReqID = 0;
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int ResourceRequest::maxReqCount = 0;
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ResourceRequest::ResourceRequest(Resource *_res, DynInstPtr _inst,
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int stage_num, int res_idx, int slot_num,
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unsigned _cmd)
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: res(_res), inst(_inst), cmd(_cmd), stageNum(stage_num),
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resIdx(res_idx), slotNum(slot_num), completed(false),
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squashed(false), processing(false), memStall(false)
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{
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#ifdef DEBUG
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reqID = resReqID++;
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res->cpu->resReqCount++;
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DPRINTF(ResReqCount, "Res. Req %i created. resReqCount=%i.\n", reqID,
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res->cpu->resReqCount);
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if (res->cpu->resReqCount > 100) {
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fatal("Too many undeleted resource requests. Memory leak?\n");
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}
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if (res->cpu->resReqCount > maxReqCount) {
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maxReqCount = res->cpu->resReqCount;
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}
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#endif
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stagePasses = 0;
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complSlotNum = -1;
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}
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ResourceRequest::~ResourceRequest()
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{
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#ifdef DEBUG
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res->cpu->resReqCount--;
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DPRINTF(ResReqCount, "Res. Req %i deleted. resReqCount=%i.\n", reqID,
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res->cpu->resReqCount);
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#endif
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}
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void
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ResourceRequest::done(bool completed)
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{
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DPRINTF(Resource, "%s [slot:%i] done with request from "
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"[sn:%i] [tid:%i].\n", res->name(), slotNum,
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inst->seqNum, inst->readTid());
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setCompleted(completed);
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// Used for debugging purposes
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if (completed) {
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complSlotNum = slotNum;
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// Would like to start a convention such as all requests deleted in
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// resources/pipeline
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// but a little more complex then it seems...
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// For now, all COMPLETED requests deleted in resource..
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// all FAILED requests deleted in pipeline stage
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// *all SQUASHED requests deleted in resource
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res->cpu->reqRemoveList.push(res->reqMap[slotNum]);
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}
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// Free Slot So Another Instruction Can Use This Resource
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res->freeSlot(slotNum);
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// change slot # to -1, since we check slotNum to see if request is
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// still valid
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slotNum = -1;
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}
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ResourceEvent::ResourceEvent()
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: Event((Event::Priority)Resource_Event_Pri)
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{ }
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ResourceEvent::ResourceEvent(Resource *res, int slot_idx)
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: Event((Event::Priority)Resource_Event_Pri), resource(res),
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slotIdx(slot_idx)
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{ }
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void
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ResourceEvent::init(Resource *res, int slot_idx)
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{
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resource = res;
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slotIdx = slot_idx;
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}
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void
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ResourceEvent::process()
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{
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resource->execute(slotIdx);
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}
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const char *
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ResourceEvent::description()
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{
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string desc = resource->name() + " event";
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return desc.c_str();
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}
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void
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ResourceEvent::scheduleEvent(int delay)
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{
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InOrderCPU *cpu = resource->cpu;
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Tick when = curTick + resource->ticks(delay);
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if (squashed())
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cpu->reschedule(this, when);
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else if (!scheduled())
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cpu->schedule(this, when);
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}
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