2136feaa55
Also committed reference config.json files for the eio tests.
829 lines
No EOL
30 KiB
JSON
829 lines
No EOL
30 KiB
JSON
{
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"name": null,
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"sim_quantum": 0,
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"system": {
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"membus": {
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"slave": {
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"peer": [
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"system.system_port",
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"system.l2c.mem_side"
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],
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"role": "SLAVE"
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},
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"name": "membus",
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"header_cycles": 1,
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"width": 8,
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"eventq_index": 0,
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"master": {
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"peer": [
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"system.physmem.port"
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],
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"role": "MASTER"
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},
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"cxx_class": "CoherentBus",
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"path": "system.membus",
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"type": "CoherentBus",
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"use_default_range": false
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},
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"l2c": {
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"assoc": 8,
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"mem_side": {
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"peer": "system.membus.slave[1]",
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"role": "MASTER"
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},
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"cpu_side": {
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"peer": "system.toL2Bus.master[0]",
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"role": "SLAVE"
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},
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"name": "l2c",
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"tags": {
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"name": "tags",
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"eventq_index": 0,
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"hit_latency": 20,
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"sequential_access": false,
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"assoc": 8,
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"cxx_class": "LRU",
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"path": "system.l2c.tags",
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"block_size": 64,
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"type": "LRU",
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"size": 4194304
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},
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"hit_latency": 20,
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"mshrs": 20,
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"response_latency": 20,
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"is_top_level": false,
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"tgts_per_mshr": 12,
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"sequential_access": false,
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"max_miss_count": 0,
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"eventq_index": 0,
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"prefetch_on_access": false,
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"cxx_class": "BaseCache",
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"path": "system.l2c",
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"write_buffers": 8,
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"two_queue": false,
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"type": "BaseCache",
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"forward_snoops": true,
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"size": 4194304
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},
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"voltage_domain": {
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"eventq_index": 0,
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"path": "system.voltage_domain",
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"type": "VoltageDomain",
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"name": "voltage_domain",
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"cxx_class": "VoltageDomain"
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},
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"physmem": {
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"latency": 3.0000000000000004e-08,
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"name": "physmem",
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"eventq_index": 0,
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"latency_var": 0.0,
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"conf_table_reported": true,
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"cxx_class": "SimpleMemory",
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"path": "system.physmem",
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"null": false,
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"type": "SimpleMemory",
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"port": {
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"peer": "system.membus.master[0]",
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"role": "SLAVE"
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},
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"in_addr_map": true
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},
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"cxx_class": "System",
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"load_offset": 0,
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"work_end_ckpt_count": 0,
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"work_begin_ckpt_count": 0,
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"clk_domain": {
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"name": "clk_domain",
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"clock": 1e-09,
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"eventq_index": 0,
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"cxx_class": "SrcClockDomain",
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"path": "system.clk_domain",
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"type": "SrcClockDomain"
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},
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"eventq_index": 0,
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"toL2Bus": {
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"slave": {
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"peer": [
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"system.cpu0.icache.mem_side",
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"system.cpu0.dcache.mem_side",
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"system.cpu1.icache.mem_side",
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"system.cpu1.dcache.mem_side",
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"system.cpu2.icache.mem_side",
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"system.cpu2.dcache.mem_side",
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"system.cpu3.icache.mem_side",
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"system.cpu3.dcache.mem_side"
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],
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"role": "SLAVE"
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},
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"name": "toL2Bus",
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"header_cycles": 1,
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"width": 8,
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"eventq_index": 0,
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"master": {
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"peer": [
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"system.l2c.cpu_side"
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],
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"role": "MASTER"
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},
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"cxx_class": "CoherentBus",
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"path": "system.toL2Bus",
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"type": "CoherentBus",
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"use_default_range": false
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},
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"work_end_exit_count": 0,
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"type": "System",
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"cache_line_size": 64,
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"work_cpus_ckpt_count": 0,
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"work_begin_exit_count": 0,
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"path": "system",
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"cpu_clk_domain": {
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"name": "cpu_clk_domain",
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"clock": 5e-10,
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"eventq_index": 0,
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"cxx_class": "SrcClockDomain",
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"path": "system.cpu_clk_domain",
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"type": "SrcClockDomain"
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},
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"mem_mode": "atomic",
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"name": "system",
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"init_param": 0,
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"system_port": {
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"peer": "system.membus.slave[0]",
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"role": "MASTER"
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},
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"load_addr_mask": 1099511627775,
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"work_item_id": -1,
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"num_work_ids": 16,
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"cpu": [
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{
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"simpoint_interval": 100000000,
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"do_statistics_insts": true,
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"numThreads": 1,
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"itb": {
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"name": "itb",
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"eventq_index": 0,
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"cxx_class": "AlphaISA::TLB",
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"path": "system.cpu0.itb",
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"type": "AlphaTLB",
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"size": 48
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},
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"function_trace": false,
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"do_checkpoint_insts": true,
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"cxx_class": "AtomicSimpleCPU",
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"max_loads_all_threads": 0,
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"simpoint_profile": false,
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"simulate_data_stalls": false,
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"function_trace_start": 0,
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"cpu_id": 0,
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"width": 1,
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"eventq_index": 0,
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"do_quiesce": true,
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"type": "AtomicSimpleCPU",
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"fastmem": false,
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"profile": 0.0,
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"icache_port": {
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"peer": "system.cpu0.icache.cpu_side",
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"role": "MASTER"
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},
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"icache": {
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"assoc": 1,
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"mem_side": {
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"peer": "system.toL2Bus.slave[0]",
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"role": "MASTER"
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},
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"cpu_side": {
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"peer": "system.cpu0.icache_port",
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"role": "SLAVE"
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},
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"name": "icache",
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"tags": {
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"name": "tags",
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"eventq_index": 0,
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"hit_latency": 2,
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"sequential_access": false,
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"assoc": 1,
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"cxx_class": "LRU",
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"path": "system.cpu0.icache.tags",
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"block_size": 64,
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"type": "LRU",
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"size": 32768
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},
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"hit_latency": 2,
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"mshrs": 4,
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"response_latency": 2,
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"is_top_level": true,
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"tgts_per_mshr": 20,
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"sequential_access": false,
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"max_miss_count": 0,
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"eventq_index": 0,
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"prefetch_on_access": false,
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"cxx_class": "BaseCache",
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"path": "system.cpu0.icache",
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"write_buffers": 8,
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"two_queue": false,
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"type": "BaseCache",
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"forward_snoops": true,
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"size": 32768
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},
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"interrupts": {
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"eventq_index": 0,
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"path": "system.cpu0.interrupts",
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"type": "AlphaInterrupts",
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"name": "interrupts",
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"cxx_class": "AlphaISA::Interrupts"
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},
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"socket_id": 0,
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"max_insts_all_threads": 0,
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"path": "system.cpu0",
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"isa": [
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{
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"eventq_index": 0,
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"path": "system.cpu0.isa",
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"type": "AlphaISA",
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"name": "isa",
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"cxx_class": "AlphaISA::ISA"
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}
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],
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"switched_out": false,
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"workload": [
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{
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"name": "workload",
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"eventq_index": 0,
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"cxx_class": "EioProcess",
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"path": "system.cpu0.workload",
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"max_stack_size": 67108864,
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"type": "EioProcess"
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}
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],
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"name": "cpu0",
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"dtb": {
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"name": "dtb",
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"eventq_index": 0,
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"cxx_class": "AlphaISA::TLB",
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"path": "system.cpu0.dtb",
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"type": "AlphaTLB",
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"size": 64
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},
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"max_insts_any_thread": 500000,
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"simulate_inst_stalls": false,
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"progress_interval": 0.0,
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"dcache_port": {
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"peer": "system.cpu0.dcache.cpu_side",
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"role": "MASTER"
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},
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"dcache": {
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"assoc": 4,
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"mem_side": {
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"peer": "system.toL2Bus.slave[1]",
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"role": "MASTER"
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},
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"cpu_side": {
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"peer": "system.cpu0.dcache_port",
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"role": "SLAVE"
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},
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"name": "dcache",
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"tags": {
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"name": "tags",
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"eventq_index": 0,
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"hit_latency": 2,
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"sequential_access": false,
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"assoc": 4,
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"cxx_class": "LRU",
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"path": "system.cpu0.dcache.tags",
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"block_size": 64,
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"type": "LRU",
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"size": 32768
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},
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"hit_latency": 2,
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"mshrs": 4,
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"response_latency": 2,
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"is_top_level": true,
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"tgts_per_mshr": 20,
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"sequential_access": false,
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"max_miss_count": 0,
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"eventq_index": 0,
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"prefetch_on_access": false,
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"cxx_class": "BaseCache",
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"path": "system.cpu0.dcache",
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"write_buffers": 8,
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"two_queue": false,
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"type": "BaseCache",
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"forward_snoops": true,
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"size": 32768
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},
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"max_loads_any_thread": 0,
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"tracer": {
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"eventq_index": 0,
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"path": "system.cpu0.tracer",
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"type": "ExeTracer",
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"name": "tracer",
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"cxx_class": "Trace::ExeTracer"
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}
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},
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{
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"simpoint_interval": 100000000,
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"do_statistics_insts": true,
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"numThreads": 1,
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"itb": {
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"name": "itb",
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"eventq_index": 0,
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"cxx_class": "AlphaISA::TLB",
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"path": "system.cpu1.itb",
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"type": "AlphaTLB",
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"size": 48
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},
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"function_trace": false,
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"do_checkpoint_insts": true,
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"cxx_class": "AtomicSimpleCPU",
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"max_loads_all_threads": 0,
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"simpoint_profile": false,
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"simulate_data_stalls": false,
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"function_trace_start": 0,
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"cpu_id": 1,
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"width": 1,
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"eventq_index": 0,
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"do_quiesce": true,
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"type": "AtomicSimpleCPU",
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"fastmem": false,
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"profile": 0.0,
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"icache_port": {
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"peer": "system.cpu1.icache.cpu_side",
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"role": "MASTER"
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},
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"icache": {
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"assoc": 1,
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"mem_side": {
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"peer": "system.toL2Bus.slave[2]",
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"role": "MASTER"
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},
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"cpu_side": {
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"peer": "system.cpu1.icache_port",
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"role": "SLAVE"
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},
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"name": "icache",
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"tags": {
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"name": "tags",
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"eventq_index": 0,
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"hit_latency": 2,
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"sequential_access": false,
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"assoc": 1,
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"cxx_class": "LRU",
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"path": "system.cpu1.icache.tags",
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"block_size": 64,
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"type": "LRU",
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"size": 32768
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},
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"hit_latency": 2,
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"mshrs": 4,
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"response_latency": 2,
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"is_top_level": true,
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"tgts_per_mshr": 20,
|
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"sequential_access": false,
|
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"max_miss_count": 0,
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"eventq_index": 0,
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"prefetch_on_access": false,
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"cxx_class": "BaseCache",
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"path": "system.cpu1.icache",
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"write_buffers": 8,
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"two_queue": false,
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"type": "BaseCache",
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"forward_snoops": true,
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"size": 32768
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},
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"interrupts": {
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"eventq_index": 0,
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"path": "system.cpu1.interrupts",
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"type": "AlphaInterrupts",
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"name": "interrupts",
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"cxx_class": "AlphaISA::Interrupts"
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},
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"socket_id": 0,
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"max_insts_all_threads": 0,
|
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"path": "system.cpu1",
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"isa": [
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{
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"eventq_index": 0,
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"path": "system.cpu1.isa",
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"type": "AlphaISA",
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"name": "isa",
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"cxx_class": "AlphaISA::ISA"
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}
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],
|
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"switched_out": false,
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"workload": [
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{
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"name": "workload",
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"eventq_index": 0,
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"cxx_class": "EioProcess",
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"path": "system.cpu1.workload",
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"max_stack_size": 67108864,
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"type": "EioProcess"
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}
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],
|
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"name": "cpu1",
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"dtb": {
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"name": "dtb",
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"eventq_index": 0,
|
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"cxx_class": "AlphaISA::TLB",
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"path": "system.cpu1.dtb",
|
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"type": "AlphaTLB",
|
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"size": 64
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},
|
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"max_insts_any_thread": 500000,
|
|
"simulate_inst_stalls": false,
|
|
"progress_interval": 0.0,
|
|
"dcache_port": {
|
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"peer": "system.cpu1.dcache.cpu_side",
|
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"role": "MASTER"
|
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},
|
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"dcache": {
|
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"assoc": 4,
|
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"mem_side": {
|
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"peer": "system.toL2Bus.slave[3]",
|
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"role": "MASTER"
|
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},
|
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"cpu_side": {
|
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"peer": "system.cpu1.dcache_port",
|
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"role": "SLAVE"
|
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},
|
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"name": "dcache",
|
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"tags": {
|
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"name": "tags",
|
|
"eventq_index": 0,
|
|
"hit_latency": 2,
|
|
"sequential_access": false,
|
|
"assoc": 4,
|
|
"cxx_class": "LRU",
|
|
"path": "system.cpu1.dcache.tags",
|
|
"block_size": 64,
|
|
"type": "LRU",
|
|
"size": 32768
|
|
},
|
|
"hit_latency": 2,
|
|
"mshrs": 4,
|
|
"response_latency": 2,
|
|
"is_top_level": true,
|
|
"tgts_per_mshr": 20,
|
|
"sequential_access": false,
|
|
"max_miss_count": 0,
|
|
"eventq_index": 0,
|
|
"prefetch_on_access": false,
|
|
"cxx_class": "BaseCache",
|
|
"path": "system.cpu1.dcache",
|
|
"write_buffers": 8,
|
|
"two_queue": false,
|
|
"type": "BaseCache",
|
|
"forward_snoops": true,
|
|
"size": 32768
|
|
},
|
|
"max_loads_any_thread": 0,
|
|
"tracer": {
|
|
"eventq_index": 0,
|
|
"path": "system.cpu1.tracer",
|
|
"type": "ExeTracer",
|
|
"name": "tracer",
|
|
"cxx_class": "Trace::ExeTracer"
|
|
}
|
|
},
|
|
{
|
|
"simpoint_interval": 100000000,
|
|
"do_statistics_insts": true,
|
|
"numThreads": 1,
|
|
"itb": {
|
|
"name": "itb",
|
|
"eventq_index": 0,
|
|
"cxx_class": "AlphaISA::TLB",
|
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"path": "system.cpu2.itb",
|
|
"type": "AlphaTLB",
|
|
"size": 48
|
|
},
|
|
"function_trace": false,
|
|
"do_checkpoint_insts": true,
|
|
"cxx_class": "AtomicSimpleCPU",
|
|
"max_loads_all_threads": 0,
|
|
"simpoint_profile": false,
|
|
"simulate_data_stalls": false,
|
|
"function_trace_start": 0,
|
|
"cpu_id": 2,
|
|
"width": 1,
|
|
"eventq_index": 0,
|
|
"do_quiesce": true,
|
|
"type": "AtomicSimpleCPU",
|
|
"fastmem": false,
|
|
"profile": 0.0,
|
|
"icache_port": {
|
|
"peer": "system.cpu2.icache.cpu_side",
|
|
"role": "MASTER"
|
|
},
|
|
"icache": {
|
|
"assoc": 1,
|
|
"mem_side": {
|
|
"peer": "system.toL2Bus.slave[4]",
|
|
"role": "MASTER"
|
|
},
|
|
"cpu_side": {
|
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"peer": "system.cpu2.icache_port",
|
|
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},
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"type": "AlphaInterrupts",
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},
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"isa": [
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{
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"path": "system.cpu2.isa",
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"type": "AlphaISA",
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}
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],
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{
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"type": "EioProcess"
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}
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],
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},
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},
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},
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"path": "system.cpu2.tracer",
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"cxx_class": "Trace::ExeTracer"
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}
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},
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{
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"name": "itb",
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"path": "system.cpu3.itb",
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"type": "AlphaTLB",
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"size": 48
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},
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"peer": "system.cpu3.icache.cpu_side",
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"role": "MASTER"
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},
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"peer": "system.toL2Bus.slave[6]",
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},
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"peer": "system.cpu3.icache_port",
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},
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},
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},
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"type": "AlphaInterrupts",
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"name": "interrupts",
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},
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{
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"type": "AlphaISA",
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}
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],
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{
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"type": "EioProcess"
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}
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],
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"name": "cpu3",
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},
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"role": "MASTER"
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},
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"peer": "system.toL2Bus.slave[7]",
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"role": "MASTER"
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},
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"cpu_side": {
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"peer": "system.cpu3.dcache_port",
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"role": "SLAVE"
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},
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"name": "dcache",
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},
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},
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"path": "system.cpu3.tracer",
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"type": "ExeTracer",
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"name": "tracer",
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"cxx_class": "Trace::ExeTracer"
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|
}
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}
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|
],
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|
},
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|
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"time_sync_spin_threshold": 9.999999999999999e-05,
|
|
"cxx_class": "Root",
|
|
"path": "root",
|
|
"time_sync_enable": false,
|
|
"type": "Root",
|
|
"full_system": false
|
|
} |