3d99b4a544
arch/sparc/isa/base.isa:
Added a set of abbreviations for the different condition tests.
arch/sparc/isa/decoder.isa:
Fixes and additions to get syscall emulation closer to working.
arch/sparc/isa/formats/branch.isa:
Fixed branches so that the immediate version actually uses the immediate value
arch/sparc/isa/formats/integerop.isa:
Compute the condition codes -before- writing to the state of the machine.
arch/sparc/isa/formats/mem.isa:
An attempt to fix up the output of the disassembly of loads and stores.
arch/sparc/isa/formats/trap.isa:
Added code to disassemble a trap instruction. This probably needs to be fixed up so there are immediate and register versions.
arch/sparc/isa/operands.isa:
Added an R1 operand, and fixed up the numbering
arch/sparc/isa_traits.hh:
SyscallNumReg is no longer needed, the max number of sources and destinations are fixed up, and the syscall return uses xcc instead of icc.
arch/sparc/linux/process.cc:
arch/sparc/linux/process.hh:
Added a getresuidFunc syscall implementation. This isn't actually used, but I thought it was and will leave it in.
arch/sparc/process.cc:
arch/sparc/process.hh:
Fixed up how the initial stack frame is set up.
arch/sparc/regfile.hh:
Changed the number of windows from 6 to 32 so we don't have to worry about spill and fill traps for now, and commented out the register file setting itself up.
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/simple/cpu.hh:
sim/process.cc:
sim/process.hh:
Changed the syscall mechanism to pass down the syscall number directly.
--HG--
extra : convert_revision : 15723b949a0ddb3d24e68c079343b4dba2439f43
64 lines
1.8 KiB
Text
64 lines
1.8 KiB
Text
////////////////////////////////////////////////////////////////////
|
|
//
|
|
// Trap instructions
|
|
//
|
|
|
|
output header {{
|
|
/**
|
|
* Base class for trap instructions,
|
|
* or instructions that always fault.
|
|
*/
|
|
class Trap : public SparcStaticInst
|
|
{
|
|
protected:
|
|
|
|
// Constructor
|
|
Trap(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
|
|
SparcStaticInst(mnem, _machInst, __opClass), trapNum(SW_TRAP)
|
|
{
|
|
}
|
|
|
|
std::string generateDisassembly(Addr pc,
|
|
const SymbolTable *symtab) const;
|
|
|
|
int trapNum;
|
|
};
|
|
}};
|
|
|
|
output decoder {{
|
|
std::string Trap::generateDisassembly(Addr pc,
|
|
const SymbolTable *symtab) const
|
|
{
|
|
std::stringstream response;
|
|
|
|
printMnemonic(response, mnemonic);
|
|
ccprintf(response, " ");
|
|
printReg(response, _srcRegIdx[0]);
|
|
ccprintf(response, ", 0x%x", trapNum);
|
|
ccprintf(response, ", or ");
|
|
printReg(response, _srcRegIdx[1]);
|
|
return response.str();
|
|
}
|
|
}};
|
|
|
|
def template TrapExecute {{
|
|
Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
|
|
Trace::InstRecord *traceData) const
|
|
{
|
|
Fault fault = NoFault;
|
|
%(op_decl)s;
|
|
%(op_rd)s;
|
|
%(code)s
|
|
return fault;
|
|
}
|
|
}};
|
|
|
|
def format Trap(code, *opt_flags) {{
|
|
orig_code = code
|
|
cblk = CodeBlock(code)
|
|
iop = InstObjParams(name, Name, 'Trap', cblk, opt_flags)
|
|
header_output = BasicDeclare.subst(iop)
|
|
decoder_output = BasicConstructor.subst(iop)
|
|
decode_block = BasicDecode.subst(iop)
|
|
exec_output = TrapExecute.subst(iop)
|
|
}};
|