gem5/src/arch/alpha/isa
Korey Sewell 2012202b06 inorder/alpha-isa: create eaComp object visible to StaticInst through ISA
Remove subinstructions eaComp/memAcc since unused in CPU Models. Instead, create eaComp that is visible from StaticInst object. Gives InOrder model capability of generating address without actually initiating access
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2009-05-12 15:01:14 -04:00
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branch.isa Convert Alpha (and finish converting MIPS) to new 2006-12-17 19:27:50 -08:00
decoder.isa Memory: Rename LOCKED for load locked store conditional to LLSC. 2009-04-19 04:25:01 -07:00
fp.isa alpha: Clean up namespace usage. 2008-09-27 21:03:47 -07:00
int.isa Convert Alpha (and finish converting MIPS) to new 2006-12-17 19:27:50 -08:00
main.isa CPA: Add new object for gathering critical path annotations. 2009-02-26 19:29:17 -05:00
mem.isa inorder/alpha-isa: create eaComp object visible to StaticInst through ISA 2009-05-12 15:01:14 -04:00
opcdec.isa Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
pal.isa inorder/alpha-isa: create eaComp object visible to StaticInst through ISA 2009-05-12 15:01:14 -04:00
unimp.isa Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
unknown.isa Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
util.isa Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00