481eb6ae80
Another churn to clean up undefined behaviour, mostly ARM, but some parts also touching the generic part of the code base. Most of the fixes are simply ensuring that proper intialisation. One of the more subtle changes is the return type of the sign-extension, which is changed to uint64_t. This is to avoid shifting negative values (undefined behaviour) in the ISA code.
143 lines
4.2 KiB
C++
143 lines
4.2 KiB
C++
/*
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* Copyright (c) 2009, 2014 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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*/
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/** @file
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* Implementation of RealView platform.
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*/
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#include <deque>
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#include <string>
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#include <vector>
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#include "config/the_isa.hh"
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#include "cpu/intr_control.hh"
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#include "dev/arm/base_gic.hh"
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#include "dev/arm/realview.hh"
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#include "dev/terminal.hh"
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#include "sim/system.hh"
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using namespace std;
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using namespace TheISA;
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RealView::RealView(const Params *p)
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: Platform(p), system(p->system), gic(nullptr)
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{}
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void
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RealView::initState()
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{
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Addr junk;
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bool has_gen_pci_host;
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has_gen_pci_host = system->kernelSymtab->findAddress("gen_pci_setup", junk);
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if (has_gen_pci_host && !params()->pci_cfg_gen_offsets)
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warn("Kernel supports generic PCI host but PCI Config offsets "
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"configured for legacy. Set pci_cfg_gen_offsets to True");
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if (has_gen_pci_host && !params()->pci_io_base)
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warn("Kernel supports generic PCI host but PCI IO base is set "
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"to 0. Set pci_io_base to the start of PCI IO space");
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}
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void
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RealView::postConsoleInt()
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{
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warn_once("Don't know what interrupt to post for console.\n");
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//panic("Need implementation\n");
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}
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void
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RealView::clearConsoleInt()
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{
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warn_once("Don't know what interrupt to clear for console.\n");
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//panic("Need implementation\n");
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}
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void
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RealView::postPciInt(int line)
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{
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gic->sendInt(line);
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}
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void
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RealView::clearPciInt(int line)
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{
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gic->clearInt(line);
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}
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Addr
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RealView::pciToDma(Addr pciAddr) const
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{
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return pciAddr;
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}
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Addr
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RealView::calcPciConfigAddr(int bus, int dev, int func)
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{
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if (bus != 0)
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return ULL(-1);
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Addr cfg_offset = 0;
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if (params()->pci_cfg_gen_offsets)
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cfg_offset |= ((func & 7) << 12) | ((dev & 0x1f) << 15);
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else
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cfg_offset |= ((func & 7) << 16) | ((dev & 0x1f) << 19);
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return params()->pci_cfg_base | cfg_offset;
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}
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Addr
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RealView::calcPciIOAddr(Addr addr)
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{
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return params()->pci_io_base + addr;
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}
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Addr
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RealView::calcPciMemAddr(Addr addr)
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{
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return addr;
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}
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RealView *
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RealViewParams::create()
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{
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return new RealView(this);
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}
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