gem5/src/arch/sparc
Steve Reinhardt 1b6355c895 cpu. arch: add initiateMemRead() to ExecContext interface
For historical reasons, the ExecContext interface had a single
function, readMem(), that did two different things depending on
whether the ExecContext supported atomic memory mode (i.e.,
AtomicSimpleCPU) or timing memory mode (all the other models).
In the former case, it actually performed a memory read; in the
latter case, it merely initiated a read access, and the read
completion did not happen until later when a response packet
arrived from the memory system.

This led to some confusing things, including timing accesses
being required to provide a pointer for the return data even
though that pointer was only used in atomic mode.

This patch splits this interface, adding a new initiateMemRead()
function to the ExecContext interface to replace the timing-mode
use of readMem().

For consistency and clarity, the readMemTiming() helper function
in the ISA definitions is renamed to initiateMemRead() as well.
For x86, where the access size is passed in explicitly, we can
also get rid of the data parameter at this level.  For other ISAs,
where the access size is determined from the type of the data
parameter, we have to keep the parameter for that purpose.
2016-01-17 18:27:46 -08:00
..
isa cpu. arch: add initiateMemRead() to ExecContext interface 2016-01-17 18:27:46 -08:00
linux sim: revert 6709bbcf564d 2014-10-22 15:59:57 -05:00
solaris MEM: Add port proxies instead of non-structural ports 2012-01-17 12:55:08 -06:00
asi.cc SPARC: Clean up some historical style issues. 2010-11-11 02:03:58 -08:00
asi.hh SPARC: Clean up some historical style issues. 2010-11-11 02:03:58 -08:00
decoder.cc ISA,CPU: Generalize and split out the components of the decode cache. 2012-05-26 13:45:12 -07:00
decoder.hh isa: Add parameter to pick different decoder inside ISA 2015-10-09 14:50:54 -05:00
faults.cc arch: Use const StaticInstPtr references where possible 2014-09-27 09:08:36 -04:00
faults.hh arch: Use const StaticInstPtr references where possible 2014-09-27 09:08:36 -04:00
handlers.hh gcc: Fix warnings for gcc 4.7 and clang 3.1 2012-07-02 08:21:53 -04:00
interrupts.cc Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object. 2008-10-12 09:09:56 -07:00
interrupts.hh misc: Remove redundant compiler-specific defines 2015-10-12 04:07:59 -04:00
isa.cc isa,cpu: Add support for FS SMT Interrupts 2015-09-30 11:14:19 -05:00
isa.hh misc: Remove redundant compiler-specific defines 2015-10-12 04:07:59 -04:00
isa_traits.hh arch: Cleanup unused ISA traits constants 2014-09-03 07:42:21 -04:00
kernel_stats.hh Make commenting on close namespace brackets consistent. 2011-01-03 14:35:43 -08:00
locked_mem.hh cpu: Add CPU support for generatig wake up events when LLSC adresses are snooped. 2014-01-24 15:29:30 -06:00
microcode_rom.hh SPARC: Clean up some historical style issues. 2010-11-11 02:03:58 -08:00
miscregs.hh sparc: Fixup bit ordering in the PSTATE bit union 2014-08-26 10:13:23 -04:00
mmapped_ipr.hh arch: Add support for m5ops using mmapped IPRs 2013-09-30 12:20:43 +02:00
mt.hh clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6 2012-04-14 05:43:31 -04:00
nativetrace.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
nativetrace.hh Make commenting on close namespace brackets consistent. 2011-01-03 14:35:43 -08:00
pagetable.cc sim: Refactor the serialization base class 2015-07-07 09:51:03 +01:00
pagetable.hh sim: Refactor the serialization base class 2015-07-07 09:51:03 +01:00
process.cc arch: Cleanup unused ISA traits constants 2014-09-03 07:42:21 -04:00
process.hh mem: adding architectural page table support for SE mode 2014-08-28 10:11:44 -05:00
pseudo_inst.hh kvm, x86: Adding support for SE mode execution 2014-11-23 18:01:08 -08:00
registers.hh revert 5af8f40d8f2c 2015-07-28 01:58:04 -05:00
remote_gdb.cc arm: remote GDB: rationalize structure of register offsets 2015-12-18 15:12:07 -06:00
remote_gdb.hh arm: remote GDB: rationalize structure of register offsets 2015-12-18 15:12:07 -06:00
SConscript arch: teach ISA parser how to split code across files 2014-05-09 18:58:47 -04:00
SConsopts Rework the way SCons recurses into subdirectories, making it 2007-03-10 23:00:54 -08:00
sparc_traits.hh SPARC: Clean up some historical style issues. 2010-11-11 02:03:58 -08:00
SparcInterrupts.py sim: Include object header files in SWIG interfaces 2012-11-02 11:32:01 -05:00
SparcISA.py arch: Make the ISA class inherit from SimObject 2013-01-07 13:05:35 -05:00
SparcNativeTrace.py cpu: Put all CPU instruction tracers in a single file 2015-01-25 07:22:17 -05:00
SparcSystem.py sim: Include object header files in SWIG interfaces 2012-11-02 11:32:01 -05:00
SparcTLB.py sim: Include object header files in SWIG interfaces 2012-11-02 11:32:01 -05:00
stacktrace.hh arch: Use const StaticInstPtr references where possible 2014-09-27 09:08:36 -04:00
system.cc sim: Refactor the serialization base class 2015-07-07 09:51:03 +01:00
system.hh misc: Remove redundant compiler-specific defines 2015-10-12 04:07:59 -04:00
tlb.cc isa,cpu: Add support for FS SMT Interrupts 2015-09-30 11:14:19 -05:00
tlb.hh misc: Remove redundant compiler-specific defines 2015-10-12 04:07:59 -04:00
tlb_map.hh clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6 2012-04-14 05:43:31 -04:00
types.hh arch: get rid of unused LargestRead typedef 2016-01-17 18:27:46 -08:00
ua2005.cc isa,cpu: Add support for FS SMT Interrupts 2015-09-30 11:14:19 -05:00
utility.cc revert 5af8f40d8f2c 2015-07-28 01:58:04 -05:00
utility.hh arch: Use shared_ptr for all Faults 2014-10-16 05:49:51 -04:00
vtophys.cc MEM: Make port proxies use references rather than pointers 2012-02-24 11:45:30 -05:00
vtophys.hh MEM: Clean-up of Functional/Virtual/TranslatingPort remnants 2012-01-30 03:44:25 -05:00