14fc0996e3
- this will decode the instructions but not doing anything to create the C++ object yet
(the 1st of many steps!)
arch/mips/isa_desc/bitfields.h:
initial bitfield constants ... copied some from original alpha bitfields
arch/mips/isa_desc/decoder.h:
decoder function skeleton pt.1
- this will decode the instructions but not doing anything to create the C++ object yet
(the 1st of many steps!)
--HG--
extra : convert_revision : 2b9a0f8160c78b17f9d3d5eaf5af5a4d2f074761
73 lines
2.4 KiB
C
73 lines
2.4 KiB
C
////////////////////////////////////////////////////////////////////
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//
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// Bitfield definitions.
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//
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// Universal (format-independent) fields
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def bitfield OPCODE_HI <31:29>;
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def bitfield OPCODE_LO <28:26>;
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def bitfield SPECIAL_HI < 5: 3>;
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def bitfield SPECIAL_HI < 2: 0>;
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def bitfield REGIMM_HI <20:19>;
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def bitfield REGIMM_LO <18:16>;
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def bitfield RS <25:21>;
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def bitfield RT <20:16>;
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// Integer operate format(s>;
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def bitfield INTIMM <15: 0>; // integer immediate (literal)
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def bitfield IMM <12:12>; // immediate flag
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def bitfield INTFUNC <11: 5>; // function code
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def bitfield RD <15:11>; // dest reg
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// Memory format
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def signed bitfield MEMDISP <15: 0>; // displacement
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def bitfield MEMFUNC <15: 0>; // function code (same field, unsigned)
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// Memory-format jumps
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def bitfield JMPFUNC <15:14>; // function code (disp<15:14>)
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def bitfield JMPHINT <13: 0>; // tgt Icache idx hint (disp<13:0>)
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// Branch format
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def signed bitfield BRDISP <20: 0>; // displacement
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// Floating-point operate format
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def bitfield FMT <25:21>;
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def bitfield FT <20:16>;
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def bitfield FS <15:11>;
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def bitfield FD <10: 6>;
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def bitfield FP_FULLFUNC <15: 5>; // complete function code
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def bitfield FP_TRAPMODE <15:13>; // trapping mode
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def bitfield FP_ROUNDMODE <12:11>; // rounding mode
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def bitfield FP_TYPEFUNC <10: 5>; // type+func: handiest for decoding
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def bitfield FP_SRCTYPE <10: 9>; // source reg type
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def bitfield FP_SHORTFUNC < 8: 5>; // short function code
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def bitfield FP_SHORTFUNC_TOP2 <8:7>; // top 2 bits of short func code
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// PALcode format
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def bitfield PALFUNC <25: 0>; // function code
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// EV5 PAL instructions:
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// HW_LD/HW_ST
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def bitfield HW_LDST_PHYS <15>; // address is physical
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def bitfield HW_LDST_ALT <14>; // use ALT_MODE IPR
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def bitfield HW_LDST_WRTCK <13>; // HW_LD only: fault if no write acc
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def bitfield HW_LDST_QUAD <12>; // size: 0=32b, 1=64b
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def bitfield HW_LDST_VPTE <11>; // HW_LD only: is PTE fetch
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def bitfield HW_LDST_LOCK <10>; // HW_LD only: is load locked
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def bitfield HW_LDST_COND <10>; // HW_ST only: is store conditional
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def signed bitfield HW_LDST_DISP <9:0>; // signed displacement
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// HW_REI
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def bitfield HW_REI_TYP <15:14>; // type: stalling vs. non-stallingk
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def bitfield HW_REI_MBZ <13: 0>; // must be zero
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// HW_MTPR/MW_MFPR
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def bitfield HW_IPR_IDX <15:0>; // IPR index
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// M5 instructions
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def bitfield M5FUNC <7:0>;
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