Andreas Hansson f85286b3de MEM: Add port proxies instead of non-structural ports ... Port proxies are used to replace non-structural ports, and thus enable all ports in the system to correspond to a structural entity. This has the advantage of accessing memory through the normal memory subsystem and thus allowing any constellation of distributed memories, address maps, etc. Most accesses are done through the "system port" that is used for loading binaries, debugging etc. For the entities that belong to the CPU, e.g. threads and thread contexts, they wrap the CPU data port in a port proxy. The following replacements are made: FunctionalPort > PortProxy TranslatingPort > SETranslatingPortProxy VirtualPort > FSTranslatingPortProxy --HG-- rename : src/mem/vport.cc => src/mem/fs_translating_port_proxy.cc rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh		2012-01-17 12:55:08 -06:00
..
inorder-timing.py	MEM: Add port proxies instead of non-structural ports	2012-01-17 12:55:08 -06:00
memtest-ruby.py	MEM: Add port proxies instead of non-structural ports	2012-01-17 12:55:08 -06:00
memtest.py	MEM: Add port proxies instead of non-structural ports	2012-01-17 12:55:08 -06:00
o3-timing-mp-ruby.py	Config: Keep track of uncached and cached ports separately.	2011-02-03 20:23:00 -08:00
o3-timing-mp.py	MEM: Add port proxies instead of non-structural ports	2012-01-17 12:55:08 -06:00
o3-timing-ruby.py	Config: Keep track of uncached and cached ports separately.	2011-02-03 20:23:00 -08:00
o3-timing.py	MEM: Add port proxies instead of non-structural ports	2012-01-17 12:55:08 -06:00
pc-o3-timing.py	O3: Remove hardcoded tgts_per_mshr in O3CPU.py.	2011-12-01 00:15:22 -08:00
pc-simple-atomic.py	Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.	2011-03-17 19:20:19 -05:00
pc-simple-timing.py	Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.	2011-03-17 19:20:19 -05:00
realview-o3-dual.py	O3: Remove hardcoded tgts_per_mshr in O3CPU.py.	2011-12-01 00:15:22 -08:00
realview-o3.py	O3: Remove hardcoded tgts_per_mshr in O3CPU.py.	2011-12-01 00:15:22 -08:00
realview-simple-atomic-dual.py	ARM: Add some MP regressions and clean up the disk images and kernels a bit	2011-08-19 15:08:09 -05:00
realview-simple-atomic.py	ARM: Add some MP regressions and clean up the disk images and kernels a bit	2011-08-19 15:08:09 -05:00
realview-simple-timing-dual.py	ARM: Add some MP regressions and clean up the disk images and kernels a bit	2011-08-19 15:08:09 -05:00
realview-simple-timing.py	ARM: Add some MP regressions and clean up the disk images and kernels a bit	2011-08-19 15:08:09 -05:00
rubytest-ruby.py	MEM: Add port proxies instead of non-structural ports	2012-01-17 12:55:08 -06:00
simple-atomic-mp-ruby.py	Config: Keep track of uncached and cached ports separately.	2011-02-03 20:23:00 -08:00
simple-atomic-mp.py	MEM: Add port proxies instead of non-structural ports	2012-01-17 12:55:08 -06:00
simple-atomic.py	MEM: Add port proxies instead of non-structural ports	2012-01-17 12:55:08 -06:00
simple-timing-mp-ruby.py	MEM: Add port proxies instead of non-structural ports	2012-01-17 12:55:08 -06:00
simple-timing-mp.py	MEM: Add port proxies instead of non-structural ports	2012-01-17 12:55:08 -06:00
simple-timing-ruby.py	MEM: Add port proxies instead of non-structural ports	2012-01-17 12:55:08 -06:00
simple-timing.py	MEM: Add port proxies instead of non-structural ports	2012-01-17 12:55:08 -06:00
t1000-simple-atomic.py	Config: Keep track of uncached and cached ports separately.	2011-02-03 20:23:00 -08:00
tsunami-inorder.py	inorder: make InOrder CPU FS compilable/visible	2011-06-19 21:43:39 -04:00
tsunami-o3-dual.py	O3: Remove hardcoded tgts_per_mshr in O3CPU.py.	2011-12-01 00:15:22 -08:00
tsunami-o3.py	O3: Remove hardcoded tgts_per_mshr in O3CPU.py.	2011-12-01 00:15:22 -08:00
tsunami-simple-atomic-dual.py	Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.	2011-03-17 19:20:19 -05:00
tsunami-simple-atomic.py	Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.	2011-03-17 19:20:19 -05:00
tsunami-simple-timing-dual.py	Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.	2011-03-17 19:20:19 -05:00
tsunami-simple-timing.py	Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.	2011-03-17 19:20:19 -05:00
twosys-tsunami-simple-atomic.py	Config: Keep track of uncached and cached ports separately.	2011-02-03 20:23:00 -08:00