33b28fde7a
This changeset contains a lot of different changes that are too mingled to separate. They are: 1. Added MOESI_CMP_directory I made the changes necessary to bring back MOESI_CMP_directory, including adding a DMA controller. I got rid of MOESI_CMP_directory_m and made MOESI_CMP_directory use a memory controller. Added a new configuration for two level protocols in general, and MOESI_CMP_directory in particular. 2. DMA Sequencer uses a generic SequencerMsg I will eventually make the cache Sequencer use this type as well. It doesn't contain an offset field, just a physical address and a length. MI_example has been updated to deal with this. 3. Parameterized Controllers SLICC controllers can now take custom parameters to use for mapping, latencies, etc. Currently, only int parameters are supported.
96 lines
3.1 KiB
C++
96 lines
3.1 KiB
C++
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/*
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* Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* TimerTable.hh
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*
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* Description:
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*
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* $Id$
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*
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*/
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#ifndef TIMERTABLE_H
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#define TIMERTABLE_H
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#include "mem/ruby/common/Global.hh"
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#include "mem/gems_common/Map.hh"
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#include "mem/ruby/common/Address.hh"
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class Consumer;
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class TimerTable {
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public:
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// Constructors
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TimerTable();
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// Destructor
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//~TimerTable();
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// Class Methods
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static void printConfig(ostream& out) {}
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// Public Methods
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void setConsumer(Consumer* consumer_ptr) { ASSERT(m_consumer_ptr==NULL); m_consumer_ptr = consumer_ptr; }
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void setDescription(const string& name) { m_name = name; }
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bool isReady() const;
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const Address& readyAddress() const;
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bool isSet(const Address& address) const { return m_map.exist(address); }
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void set(const Address& address, Time relative_latency);
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void unset(const Address& address);
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void print(ostream& out) const;
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private:
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// Private Methods
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void updateNext() const;
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// Private copy constructor and assignment operator
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TimerTable(const TimerTable& obj);
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TimerTable& operator=(const TimerTable& obj);
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// Data Members (m_prefix)
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Map<Address, Time> m_map;
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mutable bool m_next_valid;
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mutable Time m_next_time; // Only valid if m_next_valid is true
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mutable Address m_next_address; // Only valid if m_next_valid is true
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Consumer* m_consumer_ptr; // Consumer to signal a wakeup()
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string m_name;
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};
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// ******************* Definitions *******************
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// Output operator definition
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extern inline
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ostream& operator<<(ostream& out, const TimerTable& obj)
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{
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obj.print(out);
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out << flush;
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return out;
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}
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#endif //TIMERTABLE_H
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