gem5/ext/sst/ExtMaster.hh
Curtis Dunham f05cb84ed1 ext: Add SST connector
This patch adds a connector that allows gem5 to be used as a component
in SST (Structural Simulation Toolkit, sst-simulator.org). At a high
level, this allows memory traffic to pass between the two simulators.
SST Links are roughly analogous to gem5 Ports, although Links do not
have a notion of master and slave. This distinction is important to
gem5, so when connecting a gem5 CPU to an SST cache, an ExternalSlave
must be used, and similarly when connecting the memory side of SST cache
to a gem5 port (for memory <-> I/O), an ExternalMaster must be used.

These connectors handle the administrative aspects of gem5
(initialization, simulation, shutdown) as well as translating SST's
MemEvents into gem5 Packets and vice-versa.
2015-04-08 15:56:06 -05:00

119 lines
3.8 KiB
C++

// Copyright (c) 2015 ARM Limited
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// Copyright 2009-2014 Sandia Coporation. Under the terms
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// For license information, see the LICENSE file in the current directory.
#ifndef EXT_SST_EXTMASTER_HH
#define EXT_SST_EXTMASTER_HH
#include <list>
#include <set>
#include <sst/core/serialization.h>
#include <sst/core/component.h>
#include <sst/elements/memHierarchy/memEvent.h>
#include <sim/sim_object.hh>
#include <mem/packet.hh>
#include <mem/request.hh>
#include <mem/external_master.hh>
namespace SST {
using MemHierarchy::MemEvent;
class Link;
class Event;
namespace MemHierarchy {
class MemNIC;
}
namespace gem5 {
class gem5Component;
class ExtMaster : public ExternalMaster::Port {
enum Phase { CONSTRUCTION, INIT, RUN };
Output& out;
const ExternalMaster& port;
Phase simPhase;
gem5Component *const gem5;
const std::string name;
std::list<PacketPtr> sendQ;
bool blocked() { return !sendQ.empty(); }
MemHierarchy::MemNIC * nic;
struct SenderState : public Packet::SenderState
{
MemEvent *event;
SenderState(MemEvent* e) : event(e) {}
};
std::set<AddrRange> ranges;
public:
bool recvTimingResp(PacketPtr);
void recvReqRetry();
ExtMaster(gem5Component*, Output&, ExternalMaster&, std::string&);
void init(unsigned phase);
void setup();
void finish();
void clock();
// receive Requests from SST bound for a gem5 slave;
// this module is "external" from gem5's perspective, thus ExternalMaster.
void handleEvent(SST::Event*);
protected:
virtual void recvRangeChange();
};
} // namespace gem5
} // namespace SST
#endif