gem5/ext/mcpat/cacti/cacti_interface.cc
Yasuko Eckert 0deef376d9 ext: McPAT interface changes and fixes
This patch includes software engineering changes and some generic bug fixes
Joel Hestness and Yasuko Eckert made to McPAT 0.8. There are still known
issues/concernts we did not have a chance to address in this patch.

High-level changes in this patch include:
 1) Making XML parsing modular and hierarchical:
   - Shift parsing responsibility into the components
   - Read XML in a (mostly) context-free recursive manner so that McPAT input
     files can contain arbitrary component hierarchies
 2) Making power, energy, and area calculations a hierarchical and recursive
    process
   - Components track their subcomponents and recursively call compute
     functions in stages
   - Make C++ object hierarchy reflect inheritance of classes of components
     with similar structures
   - Simplify computeArea() and computeEnergy() functions to eliminate
     successive calls to calculate separate TDP vs. runtime energy
   - Remove Processor component (now unnecessary) and introduce a more abstract
     System component
 3) Standardizing McPAT output across all components
   - Use a single, common data structure for storing and printing McPAT output
   - Recursively call print functions through component hierarchy
 4) For caches, allow splitting data array and tag array reads and writes for
    better accuracy
 5) Improving the usability of CACTI by printing more helpful warning and error
    messages
 6) Minor: Impose more rigorous code style for clarity (more work still to be
    done)
Overall, these changes greatly reduce the amount of replicated code, and they
improve McPAT runtime and decrease memory footprint.
2014-06-03 13:32:59 -07:00

154 lines
5.7 KiB
C++

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#include <pthread.h>
#include <algorithm>
#include <cmath>
#include <ctime>
#include <iostream>
#include "Ucache.h"
#include "area.h"
#include "basic_circuit.h"
#include "cacti_interface.h"
#include "component.h"
#include "const.h"
#include "parameter.h"
using namespace std;
bool mem_array::lt(const mem_array * m1, const mem_array * m2) {
if (m1->Nspd < m2->Nspd) return true;
else if (m1->Nspd > m2->Nspd) return false;
else if (m1->Ndwl < m2->Ndwl) return true;
else if (m1->Ndwl > m2->Ndwl) return false;
else if (m1->Ndbl < m2->Ndbl) return true;
else if (m1->Ndbl > m2->Ndbl) return false;
else if (m1->deg_bl_muxing < m2->deg_bl_muxing) return true;
else if (m1->deg_bl_muxing > m2->deg_bl_muxing) return false;
else if (m1->Ndsam_lev_1 < m2->Ndsam_lev_1) return true;
else if (m1->Ndsam_lev_1 > m2->Ndsam_lev_1) return false;
else if (m1->Ndsam_lev_2 < m2->Ndsam_lev_2) return true;
else return false;
}
void uca_org_t::find_delay() {
mem_array * data_arr = data_array2;
mem_array * tag_arr = tag_array2;
// check whether it is a regular cache or scratch ram
if (g_ip->pure_ram || g_ip->pure_cam || g_ip->fully_assoc) {
access_time = data_arr->access_time;
}
// Both tag and data lookup happen in parallel
// and the entire set is sent over the data array h-tree without
// waiting for the way-select signal --TODO add the corresponding
// power overhead Nav
else if (g_ip->fast_access == true) {
access_time = MAX(tag_arr->access_time, data_arr->access_time);
}
// Tag is accessed first. On a hit, way-select signal along with the
// address is sent to read/write the appropriate block in the data
// array
else if (g_ip->is_seq_acc == true) {
access_time = tag_arr->access_time + data_arr->access_time;
}
// Normal access: tag array access and data array access happen in parallel.
// But, the data array will wait for the way-select and transfer only the
// appropriate block over the h-tree.
else {
access_time = MAX(tag_arr->access_time + data_arr->delay_senseamp_mux_decoder,
data_arr->delay_before_subarray_output_driver) +
data_arr->delay_from_subarray_output_driver_to_output;
}
}
void uca_org_t::find_energy() {
if (!(g_ip->pure_ram || g_ip->pure_cam || g_ip->fully_assoc))
power = data_array2->power + tag_array2->power;
else
power = data_array2->power;
}
void uca_org_t::find_area() {
if (g_ip->pure_ram || g_ip->pure_cam || g_ip->fully_assoc) {
cache_ht = data_array2->height;
cache_len = data_array2->width;
} else {
cache_ht = MAX(tag_array2->height, data_array2->height);
cache_len = tag_array2->width + data_array2->width;
}
area = cache_ht * cache_len;
}
void uca_org_t::adjust_area() {
double area_adjust;
if (g_ip->pure_ram || g_ip->pure_cam || g_ip->fully_assoc) {
if (data_array2->area_efficiency / 100.0 < 0.2) {
//area_adjust = sqrt(area/(area*(data_array2->area_efficiency/100.0)/0.2));
area_adjust = sqrt(0.2 / (data_array2->area_efficiency / 100.0));
cache_ht = cache_ht / area_adjust;
cache_len = cache_len / area_adjust;
}
}
area = cache_ht * cache_len;
}
void uca_org_t::find_cyc() {
if ((g_ip->pure_ram || g_ip->pure_cam || g_ip->fully_assoc)) {
cycle_time = data_array2->cycle_time;
} else {
cycle_time = MAX(tag_array2->cycle_time,
data_array2->cycle_time);
}
}
uca_org_t :: uca_org_t()
: tag_array2(0),
data_array2(0) {
}
void uca_org_t :: cleanup() {
if (data_array2 != 0)
delete data_array2;
if (tag_array2 != 0)
delete tag_array2;
}