arch/alpha/alpha_memory.cc: arch/alpha/alpha_memory.hh: arch/alpha/arguments.cc: arch/alpha/arguments.hh: arch/alpha/ev5.cc: arch/alpha/ev5.hh: arch/alpha/fake_syscall.cc: arch/alpha/faults.cc: arch/alpha/isa_desc: arch/alpha/isa_traits.hh: arch/alpha/osfpal.cc: arch/alpha/vtophys.cc: arch/alpha/vtophys.hh: base/circlebuf.cc: base/compression/lzss_compression.cc: base/compression/lzss_compression.hh: base/cprintf.cc: base/cprintf.hh: base/fast_alloc.cc: base/fifo_buffer.cc: base/fifo_buffer.hh: base/hashmap.hh: base/hostinfo.cc: base/hostinfo.hh: base/hybrid_pred.cc: base/hybrid_pred.hh: base/inet.cc: base/inet.hh: base/inifile.cc: base/inifile.hh: base/intmath.cc: base/loader/aout_object.cc: base/loader/aout_object.hh: base/loader/ecoff_object.cc: base/loader/ecoff_object.hh: base/loader/elf_object.cc: base/loader/elf_object.hh: base/loader/exec_aout.h: base/loader/exec_ecoff.h: base/loader/object_file.cc: base/loader/object_file.hh: base/loader/symtab.cc: base/loader/symtab.hh: base/misc.cc: base/misc.hh: base/pollevent.cc: base/pollevent.hh: base/random.cc: base/random.hh: base/range.hh: base/remote_gdb.cc: base/remote_gdb.hh: base/res_list.hh: base/sat_counter.cc: base/sat_counter.hh: base/sched_list.hh: base/socket.cc: base/statistics.cc: base/statistics.hh: base/str.cc: base/trace.cc: base/trace.hh: cpu/base_cpu.cc: cpu/base_cpu.hh: cpu/exec_context.cc: cpu/exec_context.hh: cpu/exetrace.cc: cpu/exetrace.hh: cpu/intr_control.cc: cpu/intr_control.hh: cpu/memtest/memtest.cc: cpu/memtest/memtest.hh: cpu/pc_event.cc: cpu/pc_event.hh: cpu/simple_cpu/simple_cpu.cc: cpu/simple_cpu/simple_cpu.hh: cpu/static_inst.cc: cpu/static_inst.hh: dev/alpha_console.cc: dev/alpha_console.hh: dev/console.cc: dev/console.hh: dev/disk_image.cc: dev/disk_image.hh: dev/etherbus.cc: dev/etherbus.hh: dev/etherdump.cc: dev/etherdump.hh: dev/etherint.cc: dev/etherint.hh: dev/etherlink.cc: dev/etherlink.hh: dev/etherpkt.hh: dev/ethertap.cc: dev/ethertap.hh: dev/simple_disk.cc: dev/simple_disk.hh: kern/tru64/tru64_syscalls.cc: kern/tru64/tru64_syscalls.hh: sim/debug.cc: sim/eventq.cc: sim/eventq.hh: sim/main.cc: sim/param.cc: sim/param.hh: sim/prog.cc: sim/prog.hh: sim/serialize.cc: sim/serialize.hh: sim/sim_events.cc: sim/sim_events.hh: sim/sim_object.cc: sim/sim_object.hh: sim/sim_time.cc: sim/system.cc: sim/system.hh: sim/universe.cc: test/circletest.cc: test/cprintftest.cc: test/initest.cc: test/nmtest.cc: test/offtest.cc: test/paramtest.cc: test/rangetest.cc: test/stattest.cc: test/strnumtest.cc: test/symtest.cc: test/tokentest.cc: test/tracetest.cc: util/tap/tap.cc: Make include paths explicit. --HG-- extra : convert_revision : 941cbdc591fd4d3d1d9f095cd58fc23dd2d73840
215 lines
5.4 KiB
C++
215 lines
5.4 KiB
C++
/*
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* Copyright (c) 2003 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __PC_EVENT_HH__
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#define __PC_EVENT_HH__
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#include <vector>
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#include "targetarch/mem_req.hh"
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class ExecContext;
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class PCEventQueue;
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class PCEvent
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{
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protected:
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static const Addr badpc = MemReq::inval_addr;
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protected:
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std::string description;
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PCEventQueue *queue;
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Addr evpc;
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public:
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PCEvent() : queue(0), evpc(badpc) { }
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PCEvent(const std::string &desc)
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: description(desc), queue(0), evpc(badpc) { }
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PCEvent(PCEventQueue *q, Addr pc = badpc) : queue(q), evpc(pc) { }
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PCEvent(PCEventQueue *q, const std::string &desc, Addr pc = badpc)
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: description(desc), queue(q), evpc(pc) { }
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virtual ~PCEvent() { if (queue) remove(); }
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std::string descr() const { return description; }
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Addr pc() const { return evpc; }
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bool remove();
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bool schedule();
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bool schedule(Addr pc);
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bool schedule(PCEventQueue *q, Addr pc);
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virtual void process(ExecContext *xc) = 0;
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};
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class PCEventQueue
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{
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protected:
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typedef PCEvent * record_t;
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class MapCompare {
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public:
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bool operator()(const record_t &l, const record_t &r) const {
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return l->pc() < r->pc();
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}
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bool operator()(const record_t &l, Addr pc) const {
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return l->pc() < pc;
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}
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bool operator()(Addr pc, const record_t &r) const {
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return pc < r->pc();
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}
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};
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typedef std::vector<record_t> map_t;
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public:
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typedef map_t::iterator iterator;
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typedef map_t::const_iterator const_iterator;
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protected:
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typedef std::pair<iterator, iterator> range_t;
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typedef std::pair<const_iterator, const_iterator> const_range_t;
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protected:
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map_t pc_map;
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public:
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PCEventQueue();
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~PCEventQueue();
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bool remove(PCEvent *event);
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bool schedule(PCEvent *event);
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bool service(ExecContext *xc);
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range_t equal_range(Addr pc);
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range_t equal_range(PCEvent *event) { return equal_range(event->pc()); }
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void dump() const;
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};
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inline bool
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PCEvent::remove()
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{
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if (!queue)
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panic("cannot remove an uninitialized event;");
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return queue->remove(this);
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}
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inline bool
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PCEvent::schedule()
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{
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if (!queue || evpc == badpc)
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panic("cannot schedule an uninitialized event;");
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return queue->schedule(this);
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}
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inline bool
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PCEvent::schedule(Addr pc)
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{
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if (evpc != badpc)
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panic("cannot switch PC");
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evpc = pc;
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return schedule();
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}
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inline bool
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PCEvent::schedule(PCEventQueue *q, Addr pc)
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{
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if (queue)
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panic("cannot switch event queues");
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if (evpc != badpc)
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panic("cannot switch addresses");
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queue = q;
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evpc = pc;
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return schedule();
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}
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#ifdef FULL_SYSTEM
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class SkipFuncEvent : public PCEvent
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{
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public:
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SkipFuncEvent(PCEventQueue *q, const std::string &desc)
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: PCEvent(q, desc) {}
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virtual void process(ExecContext *xc);
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};
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class BadAddrEvent : public SkipFuncEvent
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{
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public:
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BadAddrEvent(PCEventQueue *q, const std::string &desc)
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: SkipFuncEvent(q, desc) {}
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virtual void process(ExecContext *xc);
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};
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class PrintfEvent : public PCEvent
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{
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public:
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PrintfEvent(PCEventQueue *q, const std::string &desc)
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: PCEvent(q, desc) {}
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virtual void process(ExecContext *xc);
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};
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class DebugPrintfEvent : public PCEvent
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{
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private:
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bool raw;
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public:
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DebugPrintfEvent(PCEventQueue *q, const std::string &desc, bool r = false)
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: PCEvent(q, desc), raw(r) {}
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virtual void process(ExecContext *xc);
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};
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class DumpMbufEvent : public PCEvent
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{
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public:
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DumpMbufEvent(PCEventQueue *q, const std::string &desc)
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: PCEvent(q, desc) {}
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virtual void process(ExecContext *xc);
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};
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#endif
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class BreakPCEvent : public PCEvent
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{
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protected:
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bool remove;
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public:
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BreakPCEvent(PCEventQueue *q, const std::string &desc, bool del = false);
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virtual void process(ExecContext *xc);
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};
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#endif // __PC_EVENT_HH__
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