5d0b25ba3f
This patch adds regression tests results and test harnesses for the Minor CPU on ARM and ALPHA.
28 lines
1.6 KiB
Text
28 lines
1.6 KiB
Text
Redirecting stdout to build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/minor-timing/simout
|
|
Redirecting stderr to build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/minor-timing/simerr
|
|
gem5 Simulator System. http://gem5.org
|
|
gem5 is copyrighted software; use the --copyright option for details.
|
|
|
|
gem5 compiled May 7 2014 10:41:53
|
|
gem5 started May 7 2014 15:05:33
|
|
gem5 executing on cz3212c2d7
|
|
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/minor-timing -re tests/run.py build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/minor-timing
|
|
Couldn't unlink build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/minor-timing/smred.sav
|
|
Couldn't unlink build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/minor-timing/smred.sv2
|
|
Global frequency set at 1000000000000 ticks per second
|
|
info: Entering event queue @ 0. Starting simulation...
|
|
info: Increasing stack size by one page.
|
|
|
|
TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
|
|
Standard Cell Placement and Global Routing Program
|
|
Authors: Carl Sechen, Bill Swartz
|
|
Yale University
|
|
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
|
|
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
|
|
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45
|
|
46 47 48 49 50 51 52 53 54 55 56 57 58 59 60
|
|
61 62 63 64 65 66 67 68 69 70 71 72 73 74 75
|
|
76 77 78 79 80 81 82 83 84 85 86 87 88 89 90
|
|
91 92 93 94 95 96 97 98 99 100 101 102 103 104 105
|
|
106 107 108 109 110 111 112 113 114 115 116 117 118 119 120
|
|
122 123 124 Exiting @ tick 51810251500 because target called exit()
|