No description
0d32940711
This patch introduces a class hierarchy of buses, a non-coherent one, and a coherent one, splitting the existing bus functionality. By doing so it also enables further specialisation of the two types of buses. A non-coherent bus connects a number of non-snooping masters and slaves, and routes the request and response packets based on the address. The request packets issued by the master connected to a non-coherent bus could still snoop in caches attached to a coherent bus, as is the case with the I/O bus and memory bus in most system configurations. No snoops will, however, reach any master on the non-coherent bus itself. The non-coherent bus can be used as a template for modelling PCI, PCIe, and non-coherent AMBA and OCP buses, and is typically used for the I/O buses. A coherent bus connects a number of (potentially) snooping masters and slaves, and routes the request and response packets based on the address, and also forwards all requests to the snoopers and deals with the snoop responses. The coherent bus can be used as a template for modelling QPI, HyperTransport, ACE and coherent OCP buses, and is typically used for the L1-to-L2 buses and as the main system interconnect. The configuration scripts are updated to use a NoncoherentBus for all peripheral and I/O buses. A bit of minor tidying up has also been done. --HG-- rename : src/mem/bus.cc => src/mem/coherent_bus.cc rename : src/mem/bus.hh => src/mem/coherent_bus.hh rename : src/mem/bus.cc => src/mem/noncoherent_bus.cc rename : src/mem/bus.hh => src/mem/noncoherent_bus.hh |
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| configs | ||
| ext | ||
| src | ||
| system | ||
| tests | ||
| util | ||
| .hgignore | ||
| .hgtags | ||
| COPYING | ||
| LICENSE | ||
| README | ||
| SConstruct | ||
This is the M5 simulator. For detailed information about building the simulator and getting started please refer to http://www.m5sim.org. Specific pages of interest are: http://www.m5sim.org/wiki/index.php/Compiling_M5 http://www.m5sim.org/wiki/index.php/Running_M5 Short version: 1. If you don't have SCons version 0.98.1 or newer, get it from http://wwww.scons.org. 2. If you don't have SWIG version 1.3.31 or newer, get it from http://wwww.swig.org. 3. Make sure you also have gcc version 3.4.6 or newer, Python 2.4 or newer (the dev version with header files), zlib, and the m4 preprocessor. 4. In this directory, type 'scons build/ALPHA_SE/tests/debug/quick'. This will build the debug version of the m5 binary (m5.debug) for the Alpha syscall emulation target, and run the quick regression tests on it. If you have questions, please send mail to m5-users@m5sim.org WHAT'S INCLUDED (AND NOT) ------------------------- The basic source release includes these subdirectories: - m5: - configs: simulation configuration scripts - ext: less-common external packages needed to build m5 - src: source code of the m5 simulator - system: source for some optional system software for simulated systems - tests: regression tests - util: useful utility programs and files To run full-system simulations, you will need compiled system firmware (console and PALcode for Alpha), kernel binaries and one or more disk images. These files for Alpha are collected in a separate archive, m5_system.tar.bz2. This file can he downloaded separately. Depending on the ISA used, M5 may support Linux 2.4/2.6, FreeBSD, and the proprietary Compaq/HP Tru64 version of Unix. We are able to distribute Linux and FreeBSD bootdisks, but we are unable to distribute bootable disk images of Tru64 Unix. If you have a Tru64 license and are interested in obtaining disk images, contact us at m5-users@m5sim.org