gem5/tests/configs/simple-atomic-mp-ruby.py
Gabe Black 00f24ae92c Config: Keep track of uncached and cached ports separately.
This makes sure that the address ranges requested for caches and uncached ports
don't conflict with each other, and that accesses which are always uncached
(message signaled interrupts for instance) don't waste time passing through
caches.
2011-02-03 20:23:00 -08:00

56 lines
2.1 KiB
Python

# Copyright (c) 2006-2007 The Regents of The University of Michigan
# All rights reserved.
#
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# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
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# redistributions in binary form must reproduce the above copyright
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# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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#
# Authors: Ron Dreslinski
import m5
from m5.objects import *
nb_cores = 4
cpus = [ AtomicSimpleCPU(cpu_id=i) for i in xrange(nb_cores) ]
import ruby_config
ruby_memory = ruby_config.generate("TwoLevel_SplitL1UnifiedL2.rb", nb_cores)
# system simulated
system = System(cpu = cpus, physmem = ruby_memory, membus = Bus())
# add L1 caches
for cpu in cpus:
cpu.connectAllPorts(system.membus)
cpu.clock = '2GHz'
# connect memory to membus
system.physmem.port = system.membus.port
# -----------------------
# run simulation
# -----------------------
root = Root(system = system)
root.system.mem_mode = 'atomic'