0ba2cc6571
configs/common/Simulation.py: Atomic CPU now works properly with caches, so we don't have to do extra parsing to hook up caches only to the timing CPU. However the O3CPU must always use caches, so a check for that must still exist. Also change the switch_cpus to be placed at the system level, now that Steve changed how the IntrController gets its CPU. configs/example/fs.py: configs/example/se.py: Atomic CPU now handles caches. --HG-- extra : convert_revision : 534ded558ef96cafd76b4b5c5317bd8f4d05076e |
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.. | ||
Benchmarks.py | ||
Caches.py | ||
FSConfig.py | ||
Options.py | ||
Simulation.py | ||
SysPaths.py |