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gem5/src/sim
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Anthony Gutierrez 0b3897fc90 O3,ARM: fix some problems with drain/switchout functionality and add Drain DPRINTFs 
This patch fixes some problems with the drain/switchout functionality
for the O3 cpu and for the ARM ISA and adds some useful debug print
statements.

This is an incremental fix as there are still a few bugs/mem leaks with the
switchout code. Particularly when switching from an O3CPU to a
TimingSimpleCPU. However, when switching from O3 to O3 cores with the ARM ISA
I haven't encountered any more assertion failures; now the kernel will
typically panic inside of simulation.
2012-08-15 10:38:08 -04:00
..
arguments.cc GetArgument: Rework getArgument so that X86_FS compiles again. 2010-10-15 23:57:06 -07:00
arguments.hh gcc: Small fixes to compile with gcc 4.7 2012-05-30 05:31:48 -04:00
async.cc Factor code out of main.cc and main.i into a bunch of files 2007-03-02 22:24:00 -08:00
async.hh style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
BaseTLB.py TLB: Make all tlbs derive from a common base class in both python and C++. 2008-10-10 23:47:42 -07:00
byteswap.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00
core.cc Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
core.hh clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
debug.cc event: minor cleanup 2011-09-22 18:59:55 -07:00
debug.hh Debug: Add a function to cause the simulator to create a checkpoint from GDB. 2011-05-04 20:38:27 -05:00
eventq.cc eventq: add a function for replacing head of the queue 2012-01-05 11:02:56 -06:00
eventq.hh EventManager: Rename queue accessor and remove cast operator 2012-07-09 12:35:46 -04:00
fault_fwd.hh copyright: clean up copyright blocks 2011-06-02 14:36:35 -07:00
faults.cc SE/FS: Get rid of FULL_SYSTEM in sim. 2011-11-02 02:11:14 -07:00
faults.hh SE/FS: Get rid of includes of config/full_system.hh. 2011-11-18 02:20:22 -08:00
full_system.hh clang: Fix recently introduced clang compilation errors 2012-03-19 06:35:04 -04:00
init.cc clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6 2012-04-14 05:43:31 -04:00
init.hh clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6 2012-04-14 05:43:31 -04:00
insttracer.hh Make commenting on close namespace brackets consistent. 2011-01-03 14:35:43 -08:00
InstTracer.py SimObjects: Clean up handling of C++ namespaces. 2008-10-09 22:19:39 -07:00
main.cc libm5: Create a libm5 static library for embedding m5. 2008-08-03 18:19:54 -07:00
microcode_rom.hh CPU: Create a microcode ROM object in the CPU which is defined by the ISA. 2008-10-12 15:59:21 -07:00
process.cc process: add progName() virtual function 2012-08-06 16:55:34 -07:00
process.hh process: add progName() virtual function 2012-08-06 16:55:34 -07:00
Process.py Add hook to call map() on Process from python. 2012-07-10 22:51:54 -07:00
process_impl.hh MEM: Make port proxies use references rather than pointers 2012-02-24 11:45:30 -05:00
pseudo_inst.cc Merge with head, hopefully the last time for this batch. 2012-01-31 22:40:08 -08:00
pseudo_inst.hh Merge with head, hopefully the last time for this batch. 2012-01-31 22:40:08 -08:00
root.cc sim: Provide a framework for detecting out of data checkpoints and migrating them. 2012-06-05 01:23:10 -04:00
root.hh sim: Provide a framework for detecting out of data checkpoints and migrating them. 2012-06-05 01:23:10 -04:00
Root.py SE/FS: Make SE vs. FS mode a runtime parameter. 2012-01-28 07:24:34 -08:00
SConscript O3,ARM: fix some problems with drain/switchout functionality and add Drain DPRINTFs 2012-08-15 10:38:08 -04:00
serialize.cc Fix: Address a few benign memory leaks 2012-07-09 12:35:30 -04:00
serialize.hh Fix: Address a few benign memory leaks 2012-07-09 12:35:30 -04:00
sim_events.cc event: minor cleanup 2011-09-22 18:59:55 -07:00
sim_events.hh sim: clean up CountedDrainEvent slightly. 2011-01-07 21:50:29 -08:00
sim_exit.hh Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
sim_object.cc clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
sim_object.hh clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
simulate.cc Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
simulate.hh types: Move stuff for global types into src/base/types.hh 2009-05-17 14:34:50 -07:00
stat_control.cc cpu: add separate stats for insts/ops both globally and per cpu model 2012-02-12 16:07:39 -06:00
stat_control.hh Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
stats.hh stats: make simTicks and simFreq accessible from stats.hh 2010-04-18 13:23:25 -07:00
syscall_emul.cc MEM: Make port proxies use references rather than pointers 2012-02-24 11:45:30 -05:00
syscall_emul.hh syscall_emul: clean up open() code a bit. 2012-08-06 16:55:28 -07:00
syscallreturn.hh includes: use base/types.hh not inttypes.h or stdint.h 2009-05-17 14:34:51 -07:00
system.cc System: set kernel to null, if unspecified. 2012-08-08 13:40:32 -05:00
system.hh syscall emulation: Add the futex system call. 2012-07-10 22:51:54 -07:00
System.py MEM: Enable multiple distributed generalized memories 2012-04-06 13:46:31 -04:00
tlb.cc SE/FS: Get rid of FULL_SYSTEM in sim. 2011-11-02 02:11:14 -07:00
tlb.hh MEM: Introduce the master/slave port sub-classes in C++ 2012-03-30 09:40:11 -04:00
vptr.hh MEM: Make port proxies use references rather than pointers 2012-02-24 11:45:30 -05:00