gem5/arch
Kevin Lim 0b2deb2a88 Fixes for full system compiling.
arch/alpha/arguments.cc:
    There will not be a phys mem ptr in the XC in the newmem.  This read will have to go through something else.
arch/alpha/ev5.cc:
    Remove instantiations of these functions for the FastCPU, as the FastCPU is not really used.  Also this messed up the ability to specify which CPU models are being built.
cpu/exec_context.hh:
    Remove getPhysMemPtr() function.
cpu/exetrace.cc:
    Include sim/system.hh, and sort the includes.
cpu/simple/cpu.cc:
    Fixes for full system compilation.
kern/system_events.cc:
    Remove include of encumbered FullCPU.  The branch prediction will need to be fixed up in a more generic way in the future.

--HG--
extra : convert_revision : a8bbf562a277aa80e8f40112570c0a825298a05c
2006-03-30 10:42:55 -05:00
..
alpha Fixes for full system compiling. 2006-03-30 10:42:55 -05:00
mips Use op_decl instead of op_src_decl + op_dest_decl in .isa templates. 2006-03-28 22:32:08 -05:00
sparc Make .isa-file ##include file paths relative to including file. 2006-03-28 22:29:42 -05:00
isa_parser.py Make .isa-file ##include file paths relative to including file. 2006-03-28 22:29:42 -05:00
isa_specific.hh Minor Sconscript edit ... mips decoder changes ... initialize NNPC and output fault name in simple cpu 2006-03-14 18:28:51 -05:00
SConscript Make .isa-file ##include file paths relative to including file. 2006-03-28 22:29:42 -05:00