gem5/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/stats.txt
Andreas Hansson 0b1108c7a3 Ruby: Bump the stats after recent memory controller changes
This patch simply bumps the stats to avoid having failing
regressions. Someone with more insight in the changes should verify
that these differences all make sense.
2012-09-10 11:57:47 -04:00

84 lines
8.9 KiB
Text

---------- Begin Simulation Statistics ----------
sim_seconds 0.000125 # Number of seconds simulated
sim_ticks 125334 # Number of ticks simulated
final_tick 125334 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
host_inst_rate 39466 # Simulator instruction rate (inst/s)
host_op_rate 39462 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 850593 # Simulator tick rate (ticks/s)
host_mem_usage 235544 # Number of bytes of host memory used
host_seconds 0.15 # Real time elapsed on the host
sim_insts 5814 # Number of instructions simulated
sim_ops 5814 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 23260 # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data 4374 # Number of bytes read from this memory
system.physmem.bytes_read::total 27634 # Number of bytes read from this memory
system.physmem.bytes_inst_read::cpu.inst 23260 # Number of instructions bytes read from this memory
system.physmem.bytes_inst_read::total 23260 # Number of instructions bytes read from this memory
system.physmem.bytes_written::cpu.data 3658 # Number of bytes written to this memory
system.physmem.bytes_written::total 3658 # Number of bytes written to this memory
system.physmem.num_reads::cpu.inst 5815 # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.data 1163 # Number of read requests responded to by this memory
system.physmem.num_reads::total 6978 # Number of read requests responded to by this memory
system.physmem.num_writes::cpu.data 925 # Number of write requests responded to by this memory
system.physmem.num_writes::total 925 # Number of write requests responded to by this memory
system.physmem.bw_read::cpu.inst 185584119 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu.data 34898751 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::total 220482870 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::cpu.inst 185584119 # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::total 185584119 # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_write::cpu.data 29186015 # Write bandwidth from this memory (bytes/s)
system.physmem.bw_write::total 29186015 # Write bandwidth from this memory (bytes/s)
system.physmem.bw_total::cpu.inst 185584119 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 64084766 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 249668885 # Total bandwidth to/from this memory (bytes/s)
system.l1_cntrl0.cacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl0.cacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl0.cacheMemory.num_tag_array_reads 0 # number of tag array reads
system.l1_cntrl0.cacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl0.cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl0.cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
system.cpu.dtb.read_hits 0 # DTB read hits
system.cpu.dtb.read_misses 0 # DTB read misses
system.cpu.dtb.read_accesses 0 # DTB read accesses
system.cpu.dtb.write_hits 0 # DTB write hits
system.cpu.dtb.write_misses 0 # DTB write misses
system.cpu.dtb.write_accesses 0 # DTB write accesses
system.cpu.dtb.hits 0 # DTB hits
system.cpu.dtb.misses 0 # DTB misses
system.cpu.dtb.accesses 0 # DTB accesses
system.cpu.itb.read_hits 0 # DTB read hits
system.cpu.itb.read_misses 0 # DTB read misses
system.cpu.itb.read_accesses 0 # DTB read accesses
system.cpu.itb.write_hits 0 # DTB write hits
system.cpu.itb.write_misses 0 # DTB write misses
system.cpu.itb.write_accesses 0 # DTB write accesses
system.cpu.itb.hits 0 # DTB hits
system.cpu.itb.misses 0 # DTB misses
system.cpu.itb.accesses 0 # DTB accesses
system.cpu.workload.num_syscalls 8 # Number of system calls
system.cpu.numCycles 125334 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.committedInsts 5814 # Number of instructions committed
system.cpu.committedOps 5814 # Number of ops (including micro ops) committed
system.cpu.num_int_alu_accesses 5113 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 2 # Number of float alu accesses
system.cpu.num_func_calls 194 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 676 # number of instructions that are conditional controls
system.cpu.num_int_insts 5113 # number of integer instructions
system.cpu.num_fp_insts 2 # number of float instructions
system.cpu.num_int_register_reads 7284 # number of times the integer registers were read
system.cpu.num_int_register_writes 3397 # number of times the integer registers were written
system.cpu.num_fp_register_reads 3 # number of times the floating registers were read
system.cpu.num_fp_register_writes 1 # number of times the floating registers were written
system.cpu.num_mem_refs 2089 # number of memory refs
system.cpu.num_load_insts 1163 # Number of load instructions
system.cpu.num_store_insts 926 # Number of store instructions
system.cpu.num_idle_cycles 0 # Number of idle cycles
system.cpu.num_busy_cycles 125334 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
---------- End Simulation Statistics ----------