Korey Sewell 07d4ad4dbe Rewrite CFC1 & CTC1 instruction definitions ... Use Load/Store Float Memory Formats for FP mem insts Fix Load/Store into FP to not create a "nop" if it sees reg 0 at the defintion arch/mips/isa/decoder.isa: Rewrite CFC1 & CTC1 instruction definitions Use Load/Store Float Memory Formats for FP mem insts arch/mips/isa/formats/fp.isa: comment changes arch/mips/isa/formats/mem.isa: Fix Load/Store Float Memory Formats --HG-- extra : convert_revision : ef1cb7a78452f8dff044b05c89e61bec866bf1b7		2006-04-27 05:07:11 -04:00
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alpha	Merge m5.eecs.umich.edu:/bk/newmem	2006-04-18 09:44:45 -04:00
mips	Rewrite CFC1 & CTC1 instruction definitions	2006-04-27 05:07:11 -04:00
sparc	Merge m5.eecs.umich.edu:/bk/newmem	2006-04-18 09:44:45 -04:00
isa_parser.py	Fixed up the isa description. Also added some capability to the isa_parser in the InstObjParams constructor.	2006-04-06 14:52:44 -04:00
isa_specific.hh	Minor Sconscript edit ... mips decoder changes ... initialize NNPC and output fault name in simple cpu	2006-03-14 18:28:51 -05:00
SConscript	Make .isa-file ##include file paths relative to including file.	2006-03-28 22:29:42 -05:00