0799600686
UBSAN flags this operation because it detects that arg is being cast directly to an unsigned type, argBits. this patch fixes this by first casting the value to a signed int type, then reintrepreting the raw bits of the signed int into argBits.
1551 lines
54 KiB
Plaintext
1551 lines
54 KiB
Plaintext
// Copyright (c) 2009 The Regents of The University of Michigan
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// Copyright (c) 2015 Advanced Micro Devices, Inc.
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//
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met: redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer;
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// redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution;
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// neither the name of the copyright holders nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Authors: Gabe Black
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def template MediaOpExecute {{
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Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
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Trace::InstRecord *traceData) const
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{
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Fault fault = NoFault;
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%(op_decl)s;
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%(op_rd)s;
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%(code)s;
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//Write the resulting state to the execution context
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if(fault == NoFault)
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{
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%(op_wb)s;
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}
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return fault;
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}
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}};
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def template MediaOpRegDeclare {{
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class %(class_name)s : public %(base_class)s
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{
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public:
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%(class_name)s(ExtMachInst _machInst,
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const char * instMnem, uint64_t setFlags,
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InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
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uint8_t _srcSize, uint8_t _destSize, uint16_t _ext);
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%(BasicExecDeclare)s
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};
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}};
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def template MediaOpImmDeclare {{
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class %(class_name)s : public %(base_class)s
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{
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public:
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%(class_name)s(ExtMachInst _machInst,
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const char * instMnem, uint64_t setFlags,
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InstRegIndex _src1, uint16_t _imm8, InstRegIndex _dest,
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uint8_t _srcSize, uint8_t _destSize, uint16_t _ext);
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%(BasicExecDeclare)s
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};
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}};
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def template MediaOpRegConstructor {{
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%(class_name)s::%(class_name)s(
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ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
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InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
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uint8_t _srcSize, uint8_t _destSize, uint16_t _ext) :
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%(base_class)s(machInst, "%(mnemonic)s", instMnem, setFlags,
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_src1, _src2, _dest, _srcSize, _destSize, _ext,
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%(op_class)s)
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{
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%(constructor)s;
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}
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}};
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def template MediaOpImmConstructor {{
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%(class_name)s::%(class_name)s(
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ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
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InstRegIndex _src1, uint16_t _imm8, InstRegIndex _dest,
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uint8_t _srcSize, uint8_t _destSize, uint16_t _ext) :
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%(base_class)s(machInst, "%(mnemonic)s", instMnem, setFlags,
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_src1, _imm8, _dest, _srcSize, _destSize, _ext,
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%(op_class)s)
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{
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%(constructor)s;
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}
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}};
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let {{
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# Make these empty strings so that concatenating onto
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# them will always work.
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header_output = ""
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decoder_output = ""
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exec_output = ""
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immTemplates = (
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MediaOpImmDeclare,
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MediaOpImmConstructor,
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MediaOpExecute)
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regTemplates = (
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MediaOpRegDeclare,
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MediaOpRegConstructor,
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MediaOpExecute)
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class MediaOpMeta(type):
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def buildCppClasses(self, name, Name, suffix, code):
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# Globals to stick the output in
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global header_output
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global decoder_output
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global exec_output
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# If op2 is used anywhere, make register and immediate versions
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# of this code.
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matcher = re.compile(r"(?<!\w)(?P<prefix>s?)op2(?P<typeQual>_[^\W_]+)?")
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match = matcher.search(code)
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if match:
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typeQual = ""
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if match.group("typeQual"):
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typeQual = match.group("typeQual")
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src2_name = "%sFpSrcReg2%s" % (match.group("prefix"), typeQual)
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self.buildCppClasses(name, Name, suffix,
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matcher.sub(src2_name, code))
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self.buildCppClasses(name + "i", Name, suffix + "Imm",
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matcher.sub("imm8", code))
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return
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base = "X86ISA::MediaOp"
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# If imm8 shows up in the code, use the immediate templates, if
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# not, hopefully the register ones will be correct.
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matcher = re.compile("(?<!\w)imm8(?!\w)")
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if matcher.search(code):
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base += "Imm"
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templates = immTemplates
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else:
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base += "Reg"
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templates = regTemplates
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# Get everything ready for the substitution
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iop = InstObjParams(name, Name + suffix, base, {"code" : code})
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# Generate the actual code (finally!)
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header_output += templates[0].subst(iop)
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decoder_output += templates[1].subst(iop)
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exec_output += templates[2].subst(iop)
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def __new__(mcls, Name, bases, dict):
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abstract = False
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name = Name.lower()
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if "abstract" in dict:
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abstract = dict['abstract']
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del dict['abstract']
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cls = super(MediaOpMeta, mcls).__new__(mcls, Name, bases, dict)
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if not abstract:
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cls.className = Name
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cls.base_mnemonic = name
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code = cls.code
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# Set up the C++ classes
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mcls.buildCppClasses(cls, name, Name, "", code)
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# Hook into the microassembler dict
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global microopClasses
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microopClasses[name] = cls
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# If op2 is used anywhere, make register and immediate versions
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# of this code.
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matcher = re.compile(r"op2(?P<typeQual>_[^\W_]+)?")
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if matcher.search(code):
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microopClasses[name + 'i'] = cls
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return cls
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class MediaOp(X86Microop):
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__metaclass__ = MediaOpMeta
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# This class itself doesn't act as a microop
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abstract = True
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def __init__(self, dest, src1, op2,
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size = None, destSize = None, srcSize = None, ext = None):
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self.dest = dest
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self.src1 = src1
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self.op2 = op2
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if size is not None:
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self.srcSize = size
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self.destSize = size
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if srcSize is not None:
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self.srcSize = srcSize
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if destSize is not None:
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self.destSize = destSize
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if self.srcSize is None:
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raise Exception, "Source size not set."
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if self.destSize is None:
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raise Exception, "Dest size not set."
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if ext is None:
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self.ext = 0
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else:
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self.ext = ext
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def getAllocator(self, microFlags):
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className = self.className
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if self.mnemonic == self.base_mnemonic + 'i':
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className += "Imm"
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allocator = '''new %(class_name)s(machInst, macrocodeBlock,
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%(flags)s, %(src1)s, %(op2)s, %(dest)s,
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%(srcSize)s, %(destSize)s, %(ext)s)''' % {
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"class_name" : className,
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"flags" : self.microFlagsText(microFlags),
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"src1" : self.src1, "op2" : self.op2,
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"dest" : self.dest,
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"srcSize" : self.srcSize,
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"destSize" : self.destSize,
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"ext" : self.ext}
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return allocator
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class Mov2int(MediaOp):
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def __init__(self, dest, src1, src2 = 0, \
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size = None, destSize = None, srcSize = None, ext = None):
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super(Mov2int, self).__init__(dest, src1,\
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src2, size, destSize, srcSize, ext)
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code = '''
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int items = sizeof(FloatRegBits) / srcSize;
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int offset = imm8;
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if (bits(src1, 0) && (ext & 0x1))
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offset -= items;
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if (offset >= 0 && offset < items) {
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uint64_t fpSrcReg1 =
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bits(FpSrcReg1_uqw,
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(offset + 1) * srcSize * 8 - 1,
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(offset + 0) * srcSize * 8);
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DestReg = merge(0, fpSrcReg1, destSize);
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} else {
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DestReg = DestReg;
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}
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'''
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class Mov2fp(MediaOp):
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def __init__(self, dest, src1, src2 = 0, \
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size = None, destSize = None, srcSize = None, ext = None):
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super(Mov2fp, self).__init__(dest, src1,\
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src2, size, destSize, srcSize, ext)
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code = '''
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int items = sizeof(FloatRegBits) / destSize;
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int offset = imm8;
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if (bits(dest, 0) && (ext & 0x1))
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offset -= items;
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if (offset >= 0 && offset < items) {
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uint64_t srcReg1 = pick(SrcReg1, 0, srcSize);
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FpDestReg_uqw =
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insertBits(FpDestReg_uqw,
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(offset + 1) * destSize * 8 - 1,
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(offset + 0) * destSize * 8, srcReg1);
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} else {
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FpDestReg_uqw = FpDestReg_uqw;
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}
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'''
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class Movsign(MediaOp):
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def __init__(self, dest, src, \
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size = None, destSize = None, srcSize = None, ext = None):
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super(Movsign, self).__init__(dest, src,\
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"InstRegIndex(0)", size, destSize, srcSize, ext)
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code = '''
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int items = sizeof(FloatRegBits) / srcSize;
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uint64_t result = 0;
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int offset = (ext & 0x1) ? items : 0;
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for (int i = 0; i < items; i++) {
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uint64_t picked =
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bits(FpSrcReg1_uqw, (i + 1) * 8 * srcSize - 1);
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result = insertBits(result, i + offset, i + offset, picked);
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}
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DestReg = DestReg | result;
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'''
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class Maskmov(MediaOp):
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code = '''
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assert(srcSize == destSize);
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int size = srcSize;
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int sizeBits = size * 8;
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int items = numItems(size);
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uint64_t result = FpDestReg_uqw;
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for (int i = 0; i < items; i++) {
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int hiIndex = (i + 1) * sizeBits - 1;
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int loIndex = (i + 0) * sizeBits;
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uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
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if (bits(FpSrcReg2_uqw, hiIndex))
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result = insertBits(result, hiIndex, loIndex, arg1Bits);
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}
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FpDestReg_uqw = result;
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'''
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class shuffle(MediaOp):
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code = '''
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assert(srcSize == destSize);
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int size = srcSize;
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int sizeBits = size * 8;
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int items = sizeof(FloatRegBits) / size;
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int options;
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int optionBits;
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if (size == 8) {
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options = 2;
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optionBits = 1;
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} else {
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options = 4;
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optionBits = 2;
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}
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uint64_t result = 0;
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uint8_t sel = ext;
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for (int i = 0; i < items; i++) {
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uint64_t resBits;
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uint8_t lsel = sel & mask(optionBits);
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if (lsel * size >= sizeof(FloatRegBits)) {
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lsel -= options / 2;
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resBits = bits(FpSrcReg2_uqw,
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(lsel + 1) * sizeBits - 1,
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(lsel + 0) * sizeBits);
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} else {
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resBits = bits(FpSrcReg1_uqw,
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(lsel + 1) * sizeBits - 1,
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(lsel + 0) * sizeBits);
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}
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sel >>= optionBits;
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int hiIndex = (i + 1) * sizeBits - 1;
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int loIndex = (i + 0) * sizeBits;
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result = insertBits(result, hiIndex, loIndex, resBits);
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}
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FpDestReg_uqw = result;
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'''
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class Unpack(MediaOp):
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code = '''
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assert(srcSize == destSize);
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int size = destSize;
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int items = (sizeof(FloatRegBits) / size) / 2;
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int offset = ext ? items : 0;
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uint64_t result = 0;
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for (int i = 0; i < items; i++) {
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uint64_t pickedLow =
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bits(FpSrcReg1_uqw, (i + offset + 1) * 8 * size - 1,
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(i + offset) * 8 * size);
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result = insertBits(result,
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(2 * i + 1) * 8 * size - 1,
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(2 * i + 0) * 8 * size,
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pickedLow);
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uint64_t pickedHigh =
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bits(FpSrcReg2_uqw, (i + offset + 1) * 8 * size - 1,
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(i + offset) * 8 * size);
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result = insertBits(result,
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(2 * i + 2) * 8 * size - 1,
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(2 * i + 1) * 8 * size,
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pickedHigh);
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}
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FpDestReg_uqw = result;
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'''
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class Pack(MediaOp):
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code = '''
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assert(srcSize == destSize * 2);
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int items = (sizeof(FloatRegBits) / destSize);
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int destBits = destSize * 8;
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int srcBits = srcSize * 8;
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uint64_t result = 0;
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int i;
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for (i = 0; i < items / 2; i++) {
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uint64_t picked =
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bits(FpSrcReg1_uqw, (i + 1) * srcBits - 1,
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(i + 0) * srcBits);
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unsigned signBit = bits(picked, srcBits - 1);
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uint64_t overflow = bits(picked, srcBits - 1, destBits - 1);
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// Handle saturation.
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if (signBit) {
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if (overflow != mask(destBits - srcBits + 1)) {
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if (signedOp())
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picked = (ULL(1) << (destBits - 1));
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else
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picked = 0;
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}
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} else {
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if (overflow != 0) {
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if (signedOp())
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picked = mask(destBits - 1);
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else
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picked = mask(destBits);
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}
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}
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result = insertBits(result,
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(i + 1) * destBits - 1,
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(i + 0) * destBits,
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picked);
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}
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for (;i < items; i++) {
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uint64_t picked =
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bits(FpSrcReg2_uqw, (i - items + 1) * srcBits - 1,
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(i - items + 0) * srcBits);
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unsigned signBit = bits(picked, srcBits - 1);
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uint64_t overflow = bits(picked, srcBits - 1, destBits - 1);
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// Handle saturation.
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if (signBit) {
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if (overflow != mask(destBits - srcBits + 1)) {
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if (signedOp())
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picked = (ULL(1) << (destBits - 1));
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else
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picked = 0;
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}
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} else {
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if (overflow != 0) {
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if (signedOp())
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picked = mask(destBits - 1);
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else
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picked = mask(destBits);
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}
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}
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result = insertBits(result,
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(i + 1) * destBits - 1,
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(i + 0) * destBits,
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picked);
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}
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FpDestReg_uqw = result;
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'''
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class Mxor(MediaOp):
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def __init__(self, dest, src1, src2):
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super(Mxor, self).__init__(dest, src1, src2, 1)
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code = '''
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FpDestReg_uqw = FpSrcReg1_uqw ^ FpSrcReg2_uqw;
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'''
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class Mor(MediaOp):
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def __init__(self, dest, src1, src2):
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super(Mor, self).__init__(dest, src1, src2, 1)
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code = '''
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FpDestReg_uqw = FpSrcReg1_uqw | FpSrcReg2_uqw;
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'''
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|
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class Mand(MediaOp):
|
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def __init__(self, dest, src1, src2):
|
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super(Mand, self).__init__(dest, src1, src2, 1)
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code = '''
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FpDestReg_uqw = FpSrcReg1_uqw & FpSrcReg2_uqw;
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'''
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|
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class Mandn(MediaOp):
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def __init__(self, dest, src1, src2):
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super(Mandn, self).__init__(dest, src1, src2, 1)
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code = '''
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FpDestReg_uqw = ~FpSrcReg1_uqw & FpSrcReg2_uqw;
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'''
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|
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class Mminf(MediaOp):
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code = '''
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union floatInt
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{
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float f;
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uint32_t i;
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};
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union doubleInt
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{
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double d;
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uint64_t i;
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};
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|
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assert(srcSize == destSize);
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int size = srcSize;
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int sizeBits = size * 8;
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assert(srcSize == 4 || srcSize == 8);
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int items = numItems(size);
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uint64_t result = FpDestReg_uqw;
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for (int i = 0; i < items; i++) {
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double arg1, arg2;
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int hiIndex = (i + 1) * sizeBits - 1;
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int loIndex = (i + 0) * sizeBits;
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uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
uint64_t arg2Bits = bits(FpSrcReg2_uqw, hiIndex, loIndex);
|
|
|
|
if (size == 4) {
|
|
floatInt fi;
|
|
fi.i = arg1Bits;
|
|
arg1 = fi.f;
|
|
fi.i = arg2Bits;
|
|
arg2 = fi.f;
|
|
} else {
|
|
doubleInt di;
|
|
di.i = arg1Bits;
|
|
arg1 = di.d;
|
|
di.i = arg2Bits;
|
|
arg2 = di.d;
|
|
}
|
|
|
|
if (arg1 < arg2) {
|
|
result = insertBits(result, hiIndex, loIndex, arg1Bits);
|
|
} else {
|
|
result = insertBits(result, hiIndex, loIndex, arg2Bits);
|
|
}
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Mmaxf(MediaOp):
|
|
code = '''
|
|
union floatInt
|
|
{
|
|
float f;
|
|
uint32_t i;
|
|
};
|
|
union doubleInt
|
|
{
|
|
double d;
|
|
uint64_t i;
|
|
};
|
|
|
|
assert(srcSize == destSize);
|
|
int size = srcSize;
|
|
int sizeBits = size * 8;
|
|
assert(srcSize == 4 || srcSize == 8);
|
|
int items = numItems(size);
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
double arg1, arg2;
|
|
int hiIndex = (i + 1) * sizeBits - 1;
|
|
int loIndex = (i + 0) * sizeBits;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
uint64_t arg2Bits = bits(FpSrcReg2_uqw, hiIndex, loIndex);
|
|
|
|
if (size == 4) {
|
|
floatInt fi;
|
|
fi.i = arg1Bits;
|
|
arg1 = fi.f;
|
|
fi.i = arg2Bits;
|
|
arg2 = fi.f;
|
|
} else {
|
|
doubleInt di;
|
|
di.i = arg1Bits;
|
|
arg1 = di.d;
|
|
di.i = arg2Bits;
|
|
arg2 = di.d;
|
|
}
|
|
|
|
if (arg1 > arg2) {
|
|
result = insertBits(result, hiIndex, loIndex, arg1Bits);
|
|
} else {
|
|
result = insertBits(result, hiIndex, loIndex, arg2Bits);
|
|
}
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Mmini(MediaOp):
|
|
code = '''
|
|
|
|
assert(srcSize == destSize);
|
|
int size = srcSize;
|
|
int sizeBits = size * 8;
|
|
int items = numItems(size);
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int hiIndex = (i + 1) * sizeBits - 1;
|
|
int loIndex = (i + 0) * sizeBits;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
int64_t arg1 = arg1Bits |
|
|
(0 - (arg1Bits & (ULL(1) << (sizeBits - 1))));
|
|
uint64_t arg2Bits = bits(FpSrcReg2_uqw, hiIndex, loIndex);
|
|
int64_t arg2 = arg2Bits |
|
|
(0 - (arg2Bits & (ULL(1) << (sizeBits - 1))));
|
|
uint64_t resBits;
|
|
|
|
if (signedOp()) {
|
|
if (arg1 < arg2) {
|
|
resBits = arg1Bits;
|
|
} else {
|
|
resBits = arg2Bits;
|
|
}
|
|
} else {
|
|
if (arg1Bits < arg2Bits) {
|
|
resBits = arg1Bits;
|
|
} else {
|
|
resBits = arg2Bits;
|
|
}
|
|
}
|
|
result = insertBits(result, hiIndex, loIndex, resBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Mmaxi(MediaOp):
|
|
code = '''
|
|
|
|
assert(srcSize == destSize);
|
|
int size = srcSize;
|
|
int sizeBits = size * 8;
|
|
int items = numItems(size);
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int hiIndex = (i + 1) * sizeBits - 1;
|
|
int loIndex = (i + 0) * sizeBits;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
int64_t arg1 = arg1Bits |
|
|
(0 - (arg1Bits & (ULL(1) << (sizeBits - 1))));
|
|
uint64_t arg2Bits = bits(FpSrcReg2_uqw, hiIndex, loIndex);
|
|
int64_t arg2 = arg2Bits |
|
|
(0 - (arg2Bits & (ULL(1) << (sizeBits - 1))));
|
|
uint64_t resBits;
|
|
|
|
if (signedOp()) {
|
|
if (arg1 > arg2) {
|
|
resBits = arg1Bits;
|
|
} else {
|
|
resBits = arg2Bits;
|
|
}
|
|
} else {
|
|
if (arg1Bits > arg2Bits) {
|
|
resBits = arg1Bits;
|
|
} else {
|
|
resBits = arg2Bits;
|
|
}
|
|
}
|
|
result = insertBits(result, hiIndex, loIndex, resBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Msqrt(MediaOp):
|
|
def __init__(self, dest, src, \
|
|
size = None, destSize = None, srcSize = None, ext = None):
|
|
super(Msqrt, self).__init__(dest, src,\
|
|
"InstRegIndex(0)", size, destSize, srcSize, ext)
|
|
code = '''
|
|
union floatInt
|
|
{
|
|
float f;
|
|
uint32_t i;
|
|
};
|
|
union doubleInt
|
|
{
|
|
double d;
|
|
uint64_t i;
|
|
};
|
|
|
|
assert(srcSize == destSize);
|
|
int size = srcSize;
|
|
int sizeBits = size * 8;
|
|
assert(srcSize == 4 || srcSize == 8);
|
|
int items = numItems(size);
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int hiIndex = (i + 1) * sizeBits - 1;
|
|
int loIndex = (i + 0) * sizeBits;
|
|
uint64_t argBits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
|
|
if (size == 4) {
|
|
floatInt fi;
|
|
fi.i = argBits;
|
|
fi.f = sqrt(fi.f);
|
|
argBits = fi.i;
|
|
} else {
|
|
doubleInt di;
|
|
di.i = argBits;
|
|
di.d = sqrt(di.d);
|
|
argBits = di.i;
|
|
}
|
|
result = insertBits(result, hiIndex, loIndex, argBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
# compute approximate reciprocal --- single-precision only
|
|
class Mrcp(MediaOp):
|
|
def __init__(self, dest, src, \
|
|
size = None, destSize = None, srcSize = None, ext = None):
|
|
super(Mrcp, self).__init__(dest, src,\
|
|
"InstRegIndex(0)", size, destSize, srcSize, ext)
|
|
code = '''
|
|
union floatInt
|
|
{
|
|
float f;
|
|
uint32_t i;
|
|
};
|
|
|
|
assert(srcSize == 4); // ISA defines single-precision only
|
|
assert(srcSize == destSize);
|
|
const int size = 4;
|
|
const int sizeBits = size * 8;
|
|
int items = numItems(size);
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int hiIndex = (i + 1) * sizeBits - 1;
|
|
int loIndex = (i + 0) * sizeBits;
|
|
uint64_t argBits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
|
|
floatInt fi;
|
|
fi.i = argBits;
|
|
// This is more accuracy than HW provides, but oh well
|
|
fi.f = 1.0 / fi.f;
|
|
argBits = fi.i;
|
|
result = insertBits(result, hiIndex, loIndex, argBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Maddf(MediaOp):
|
|
code = '''
|
|
union floatInt
|
|
{
|
|
float f;
|
|
uint32_t i;
|
|
};
|
|
union doubleInt
|
|
{
|
|
double d;
|
|
uint64_t i;
|
|
};
|
|
|
|
assert(srcSize == destSize);
|
|
int size = srcSize;
|
|
int sizeBits = size * 8;
|
|
assert(srcSize == 4 || srcSize == 8);
|
|
int items = numItems(size);
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int hiIndex = (i + 1) * sizeBits - 1;
|
|
int loIndex = (i + 0) * sizeBits;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
uint64_t arg2Bits = bits(FpSrcReg2_uqw, hiIndex, loIndex);
|
|
uint64_t resBits;
|
|
|
|
if (size == 4) {
|
|
floatInt arg1, arg2, res;
|
|
arg1.i = arg1Bits;
|
|
arg2.i = arg2Bits;
|
|
res.f = arg1.f + arg2.f;
|
|
resBits = res.i;
|
|
} else {
|
|
doubleInt arg1, arg2, res;
|
|
arg1.i = arg1Bits;
|
|
arg2.i = arg2Bits;
|
|
res.d = arg1.d + arg2.d;
|
|
resBits = res.i;
|
|
}
|
|
|
|
result = insertBits(result, hiIndex, loIndex, resBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Msubf(MediaOp):
|
|
code = '''
|
|
union floatInt
|
|
{
|
|
float f;
|
|
uint32_t i;
|
|
};
|
|
union doubleInt
|
|
{
|
|
double d;
|
|
uint64_t i;
|
|
};
|
|
|
|
assert(srcSize == destSize);
|
|
int size = srcSize;
|
|
int sizeBits = size * 8;
|
|
assert(srcSize == 4 || srcSize == 8);
|
|
int items = numItems(size);
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int hiIndex = (i + 1) * sizeBits - 1;
|
|
int loIndex = (i + 0) * sizeBits;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
uint64_t arg2Bits = bits(FpSrcReg2_uqw, hiIndex, loIndex);
|
|
uint64_t resBits;
|
|
|
|
if (size == 4) {
|
|
floatInt arg1, arg2, res;
|
|
arg1.i = arg1Bits;
|
|
arg2.i = arg2Bits;
|
|
res.f = arg1.f - arg2.f;
|
|
resBits = res.i;
|
|
} else {
|
|
doubleInt arg1, arg2, res;
|
|
arg1.i = arg1Bits;
|
|
arg2.i = arg2Bits;
|
|
res.d = arg1.d - arg2.d;
|
|
resBits = res.i;
|
|
}
|
|
|
|
result = insertBits(result, hiIndex, loIndex, resBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Mmulf(MediaOp):
|
|
code = '''
|
|
union floatInt
|
|
{
|
|
float f;
|
|
uint32_t i;
|
|
};
|
|
union doubleInt
|
|
{
|
|
double d;
|
|
uint64_t i;
|
|
};
|
|
|
|
assert(srcSize == destSize);
|
|
int size = srcSize;
|
|
int sizeBits = size * 8;
|
|
assert(srcSize == 4 || srcSize == 8);
|
|
int items = numItems(size);
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int hiIndex = (i + 1) * sizeBits - 1;
|
|
int loIndex = (i + 0) * sizeBits;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
uint64_t arg2Bits = bits(FpSrcReg2_uqw, hiIndex, loIndex);
|
|
uint64_t resBits;
|
|
|
|
if (size == 4) {
|
|
floatInt arg1, arg2, res;
|
|
arg1.i = arg1Bits;
|
|
arg2.i = arg2Bits;
|
|
res.f = arg1.f * arg2.f;
|
|
resBits = res.i;
|
|
} else {
|
|
doubleInt arg1, arg2, res;
|
|
arg1.i = arg1Bits;
|
|
arg2.i = arg2Bits;
|
|
res.d = arg1.d * arg2.d;
|
|
resBits = res.i;
|
|
}
|
|
|
|
result = insertBits(result, hiIndex, loIndex, resBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Mdivf(MediaOp):
|
|
code = '''
|
|
union floatInt
|
|
{
|
|
float f;
|
|
uint32_t i;
|
|
};
|
|
union doubleInt
|
|
{
|
|
double d;
|
|
uint64_t i;
|
|
};
|
|
|
|
assert(srcSize == destSize);
|
|
int size = srcSize;
|
|
int sizeBits = size * 8;
|
|
assert(srcSize == 4 || srcSize == 8);
|
|
int items = numItems(size);
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int hiIndex = (i + 1) * sizeBits - 1;
|
|
int loIndex = (i + 0) * sizeBits;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
uint64_t arg2Bits = bits(FpSrcReg2_uqw, hiIndex, loIndex);
|
|
uint64_t resBits;
|
|
|
|
if (size == 4) {
|
|
floatInt arg1, arg2, res;
|
|
arg1.i = arg1Bits;
|
|
arg2.i = arg2Bits;
|
|
res.f = arg1.f / arg2.f;
|
|
resBits = res.i;
|
|
} else {
|
|
doubleInt arg1, arg2, res;
|
|
arg1.i = arg1Bits;
|
|
arg2.i = arg2Bits;
|
|
res.d = arg1.d / arg2.d;
|
|
resBits = res.i;
|
|
}
|
|
|
|
result = insertBits(result, hiIndex, loIndex, resBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Maddi(MediaOp):
|
|
code = '''
|
|
assert(srcSize == destSize);
|
|
int size = srcSize;
|
|
int sizeBits = size * 8;
|
|
int items = numItems(size);
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int hiIndex = (i + 1) * sizeBits - 1;
|
|
int loIndex = (i + 0) * sizeBits;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
uint64_t arg2Bits = bits(FpSrcReg2_uqw, hiIndex, loIndex);
|
|
uint64_t resBits = arg1Bits + arg2Bits;
|
|
|
|
if (ext & 0x2) {
|
|
if (signedOp()) {
|
|
int arg1Sign = bits(arg1Bits, sizeBits - 1);
|
|
int arg2Sign = bits(arg2Bits, sizeBits - 1);
|
|
int resSign = bits(resBits, sizeBits - 1);
|
|
if ((arg1Sign == arg2Sign) && (arg1Sign != resSign)) {
|
|
if (resSign == 0)
|
|
resBits = (ULL(1) << (sizeBits - 1));
|
|
else
|
|
resBits = mask(sizeBits - 1);
|
|
}
|
|
} else {
|
|
if (findCarry(sizeBits, resBits, arg1Bits, arg2Bits))
|
|
resBits = mask(sizeBits);
|
|
}
|
|
}
|
|
|
|
result = insertBits(result, hiIndex, loIndex, resBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Msubi(MediaOp):
|
|
code = '''
|
|
assert(srcSize == destSize);
|
|
int size = srcSize;
|
|
int sizeBits = size * 8;
|
|
int items = numItems(size);
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int hiIndex = (i + 1) * sizeBits - 1;
|
|
int loIndex = (i + 0) * sizeBits;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
uint64_t arg2Bits = bits(FpSrcReg2_uqw, hiIndex, loIndex);
|
|
uint64_t resBits = arg1Bits - arg2Bits;
|
|
|
|
if (ext & 0x2) {
|
|
if (signedOp()) {
|
|
int arg1Sign = bits(arg1Bits, sizeBits - 1);
|
|
int arg2Sign = !bits(arg2Bits, sizeBits - 1);
|
|
int resSign = bits(resBits, sizeBits - 1);
|
|
if ((arg1Sign == arg2Sign) && (arg1Sign != resSign)) {
|
|
if (resSign == 0)
|
|
resBits = (ULL(1) << (sizeBits - 1));
|
|
else
|
|
resBits = mask(sizeBits - 1);
|
|
}
|
|
} else {
|
|
if (arg2Bits > arg1Bits) {
|
|
resBits = 0;
|
|
} else if (!findCarry(sizeBits, resBits,
|
|
arg1Bits, ~arg2Bits)) {
|
|
resBits = mask(sizeBits);
|
|
}
|
|
}
|
|
}
|
|
|
|
result = insertBits(result, hiIndex, loIndex, resBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Mmuli(MediaOp):
|
|
code = '''
|
|
int srcBits = srcSize * 8;
|
|
int destBits = destSize * 8;
|
|
assert(destBits <= 64);
|
|
assert(destSize >= srcSize);
|
|
int items = numItems(destSize);
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int offset = 0;
|
|
if (ext & 16) {
|
|
if (ext & 32)
|
|
offset = i * (destBits - srcBits);
|
|
else
|
|
offset = i * (destBits - srcBits) + srcBits;
|
|
}
|
|
int srcHiIndex = (i + 1) * srcBits - 1 + offset;
|
|
int srcLoIndex = (i + 0) * srcBits + offset;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, srcHiIndex, srcLoIndex);
|
|
uint64_t arg2Bits = bits(FpSrcReg2_uqw, srcHiIndex, srcLoIndex);
|
|
uint64_t resBits;
|
|
|
|
if (signedOp()) {
|
|
int64_t arg1 = arg1Bits |
|
|
(0 - (arg1Bits & (ULL(1) << (srcBits - 1))));
|
|
int64_t arg2 = arg2Bits |
|
|
(0 - (arg2Bits & (ULL(1) << (srcBits - 1))));
|
|
resBits = (uint64_t)(arg1 * arg2);
|
|
} else {
|
|
resBits = arg1Bits * arg2Bits;
|
|
}
|
|
|
|
if (ext & 0x4)
|
|
resBits += (ULL(1) << (destBits - 1));
|
|
|
|
if (multHi())
|
|
resBits >>= destBits;
|
|
|
|
int destHiIndex = (i + 1) * destBits - 1;
|
|
int destLoIndex = (i + 0) * destBits;
|
|
result = insertBits(result, destHiIndex, destLoIndex, resBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Mavg(MediaOp):
|
|
code = '''
|
|
assert(srcSize == destSize);
|
|
int size = srcSize;
|
|
int sizeBits = size * 8;
|
|
int items = numItems(size);
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int hiIndex = (i + 1) * sizeBits - 1;
|
|
int loIndex = (i + 0) * sizeBits;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
uint64_t arg2Bits = bits(FpSrcReg2_uqw, hiIndex, loIndex);
|
|
uint64_t resBits = (arg1Bits + arg2Bits + 1) / 2;
|
|
|
|
result = insertBits(result, hiIndex, loIndex, resBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Msad(MediaOp):
|
|
code = '''
|
|
int srcBits = srcSize * 8;
|
|
int items = sizeof(FloatRegBits) / srcSize;
|
|
|
|
uint64_t sum = 0;
|
|
for (int i = 0; i < items; i++) {
|
|
int hiIndex = (i + 1) * srcBits - 1;
|
|
int loIndex = (i + 0) * srcBits;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
uint64_t arg2Bits = bits(FpSrcReg2_uqw, hiIndex, loIndex);
|
|
int64_t resBits = arg1Bits - arg2Bits;
|
|
if (resBits < 0)
|
|
resBits = -resBits;
|
|
sum += resBits;
|
|
}
|
|
FpDestReg_uqw = sum & mask(destSize * 8);
|
|
'''
|
|
|
|
class Msrl(MediaOp):
|
|
code = '''
|
|
|
|
assert(srcSize == destSize);
|
|
int size = srcSize;
|
|
int sizeBits = size * 8;
|
|
int items = numItems(size);
|
|
uint64_t shiftAmt = op2_uqw;
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int hiIndex = (i + 1) * sizeBits - 1;
|
|
int loIndex = (i + 0) * sizeBits;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
uint64_t resBits;
|
|
if (shiftAmt >= sizeBits) {
|
|
resBits = 0;
|
|
} else {
|
|
resBits = (arg1Bits >> shiftAmt) &
|
|
mask(sizeBits - shiftAmt);
|
|
}
|
|
|
|
result = insertBits(result, hiIndex, loIndex, resBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Msra(MediaOp):
|
|
code = '''
|
|
|
|
assert(srcSize == destSize);
|
|
int size = srcSize;
|
|
int sizeBits = size * 8;
|
|
int items = numItems(size);
|
|
uint64_t shiftAmt = op2_uqw;
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int hiIndex = (i + 1) * sizeBits - 1;
|
|
int loIndex = (i + 0) * sizeBits;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
uint64_t resBits;
|
|
if (shiftAmt >= sizeBits) {
|
|
if (bits(arg1Bits, sizeBits - 1))
|
|
resBits = mask(sizeBits);
|
|
else
|
|
resBits = 0;
|
|
} else {
|
|
resBits = (arg1Bits >> shiftAmt);
|
|
resBits = resBits |
|
|
(0 - (resBits & (ULL(1) << (sizeBits - 1 - shiftAmt))));
|
|
}
|
|
|
|
result = insertBits(result, hiIndex, loIndex, resBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Msll(MediaOp):
|
|
code = '''
|
|
|
|
assert(srcSize == destSize);
|
|
int size = srcSize;
|
|
int sizeBits = size * 8;
|
|
int items = numItems(size);
|
|
uint64_t shiftAmt = op2_uqw;
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int hiIndex = (i + 1) * sizeBits - 1;
|
|
int loIndex = (i + 0) * sizeBits;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
uint64_t resBits;
|
|
if (shiftAmt >= sizeBits) {
|
|
resBits = 0;
|
|
} else {
|
|
resBits = (arg1Bits << shiftAmt);
|
|
}
|
|
|
|
result = insertBits(result, hiIndex, loIndex, resBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Cvtf2i(MediaOp):
|
|
def __init__(self, dest, src, \
|
|
size = None, destSize = None, srcSize = None, ext = None):
|
|
super(Cvtf2i, self).__init__(dest, src,\
|
|
"InstRegIndex(0)", size, destSize, srcSize, ext)
|
|
code = '''
|
|
union floatInt
|
|
{
|
|
float f;
|
|
uint32_t i;
|
|
};
|
|
union doubleInt
|
|
{
|
|
double d;
|
|
uint64_t i;
|
|
};
|
|
|
|
assert(destSize == 4 || destSize == 8);
|
|
assert(srcSize == 4 || srcSize == 8);
|
|
int srcSizeBits = srcSize * 8;
|
|
int destSizeBits = destSize * 8;
|
|
int items;
|
|
int srcStart = 0;
|
|
int destStart = 0;
|
|
if (srcSize == 2 * destSize) {
|
|
items = numItems(srcSize);
|
|
if (ext & 0x2)
|
|
destStart = destSizeBits * items;
|
|
} else if (destSize == 2 * srcSize) {
|
|
items = numItems(destSize);
|
|
if (ext & 0x2)
|
|
srcStart = srcSizeBits * items;
|
|
} else {
|
|
items = numItems(destSize);
|
|
}
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int srcHiIndex = srcStart + (i + 1) * srcSizeBits - 1;
|
|
int srcLoIndex = srcStart + (i + 0) * srcSizeBits;
|
|
uint64_t argBits = bits(FpSrcReg1_uqw, srcHiIndex, srcLoIndex);
|
|
double arg;
|
|
|
|
if (srcSize == 4) {
|
|
floatInt fi;
|
|
fi.i = argBits;
|
|
arg = fi.f;
|
|
} else {
|
|
doubleInt di;
|
|
di.i = argBits;
|
|
arg = di.d;
|
|
}
|
|
|
|
if (ext & 0x4) {
|
|
if (arg >= 0)
|
|
arg += 0.5;
|
|
else
|
|
arg -= 0.5;
|
|
}
|
|
|
|
if (destSize == 4) {
|
|
int32_t i_arg = (int32_t)arg;
|
|
argBits = *((uint32_t*)&i_arg);
|
|
} else {
|
|
int64_t i_arg = (int64_t)arg;
|
|
argBits = *((uint64_t*)&i_arg);
|
|
}
|
|
int destHiIndex = destStart + (i + 1) * destSizeBits - 1;
|
|
int destLoIndex = destStart + (i + 0) * destSizeBits;
|
|
result = insertBits(result, destHiIndex, destLoIndex, argBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Cvti2f(MediaOp):
|
|
def __init__(self, dest, src, \
|
|
size = None, destSize = None, srcSize = None, ext = None):
|
|
super(Cvti2f, self).__init__(dest, src,\
|
|
"InstRegIndex(0)", size, destSize, srcSize, ext)
|
|
code = '''
|
|
union floatInt
|
|
{
|
|
float f;
|
|
uint32_t i;
|
|
};
|
|
union doubleInt
|
|
{
|
|
double d;
|
|
uint64_t i;
|
|
};
|
|
|
|
assert(destSize == 4 || destSize == 8);
|
|
assert(srcSize == 4 || srcSize == 8);
|
|
int srcSizeBits = srcSize * 8;
|
|
int destSizeBits = destSize * 8;
|
|
int items;
|
|
int srcStart = 0;
|
|
int destStart = 0;
|
|
if (srcSize == 2 * destSize) {
|
|
items = numItems(srcSize);
|
|
if (ext & 0x2)
|
|
destStart = destSizeBits * items;
|
|
} else if (destSize == 2 * srcSize) {
|
|
items = numItems(destSize);
|
|
if (ext & 0x2)
|
|
srcStart = srcSizeBits * items;
|
|
} else {
|
|
items = numItems(destSize);
|
|
}
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int srcHiIndex = srcStart + (i + 1) * srcSizeBits - 1;
|
|
int srcLoIndex = srcStart + (i + 0) * srcSizeBits;
|
|
uint64_t argBits = bits(FpSrcReg1_uqw, srcHiIndex, srcLoIndex);
|
|
|
|
int64_t sArg = argBits |
|
|
(0 - (argBits & (ULL(1) << (srcSizeBits - 1))));
|
|
double arg = sArg;
|
|
|
|
if (destSize == 4) {
|
|
floatInt fi;
|
|
fi.f = arg;
|
|
argBits = fi.i;
|
|
} else {
|
|
doubleInt di;
|
|
di.d = arg;
|
|
argBits = di.i;
|
|
}
|
|
int destHiIndex = destStart + (i + 1) * destSizeBits - 1;
|
|
int destLoIndex = destStart + (i + 0) * destSizeBits;
|
|
result = insertBits(result, destHiIndex, destLoIndex, argBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Cvtf2f(MediaOp):
|
|
def __init__(self, dest, src, \
|
|
size = None, destSize = None, srcSize = None, ext = None):
|
|
super(Cvtf2f, self).__init__(dest, src,\
|
|
"InstRegIndex(0)", size, destSize, srcSize, ext)
|
|
code = '''
|
|
union floatInt
|
|
{
|
|
float f;
|
|
uint32_t i;
|
|
};
|
|
union doubleInt
|
|
{
|
|
double d;
|
|
uint64_t i;
|
|
};
|
|
|
|
assert(destSize == 4 || destSize == 8);
|
|
assert(srcSize == 4 || srcSize == 8);
|
|
int srcSizeBits = srcSize * 8;
|
|
int destSizeBits = destSize * 8;
|
|
int items;
|
|
int srcStart = 0;
|
|
int destStart = 0;
|
|
if (srcSize == 2 * destSize) {
|
|
items = numItems(srcSize);
|
|
if (ext & 0x2)
|
|
destStart = destSizeBits * items;
|
|
} else if (destSize == 2 * srcSize) {
|
|
items = numItems(destSize);
|
|
if (ext & 0x2)
|
|
srcStart = srcSizeBits * items;
|
|
} else {
|
|
items = numItems(destSize);
|
|
}
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int srcHiIndex = srcStart + (i + 1) * srcSizeBits - 1;
|
|
int srcLoIndex = srcStart + (i + 0) * srcSizeBits;
|
|
uint64_t argBits = bits(FpSrcReg1_uqw, srcHiIndex, srcLoIndex);
|
|
double arg;
|
|
|
|
if (srcSize == 4) {
|
|
floatInt fi;
|
|
fi.i = argBits;
|
|
arg = fi.f;
|
|
} else {
|
|
doubleInt di;
|
|
di.i = argBits;
|
|
arg = di.d;
|
|
}
|
|
if (destSize == 4) {
|
|
floatInt fi;
|
|
fi.f = arg;
|
|
argBits = fi.i;
|
|
} else {
|
|
doubleInt di;
|
|
di.d = arg;
|
|
argBits = di.i;
|
|
}
|
|
int destHiIndex = destStart + (i + 1) * destSizeBits - 1;
|
|
int destLoIndex = destStart + (i + 0) * destSizeBits;
|
|
result = insertBits(result, destHiIndex, destLoIndex, argBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Mcmpi2r(MediaOp):
|
|
code = '''
|
|
union floatInt
|
|
{
|
|
float f;
|
|
uint32_t i;
|
|
};
|
|
union doubleInt
|
|
{
|
|
double d;
|
|
uint64_t i;
|
|
};
|
|
|
|
assert(srcSize == destSize);
|
|
int size = srcSize;
|
|
int sizeBits = size * 8;
|
|
int items = numItems(size);
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int hiIndex = (i + 1) * sizeBits - 1;
|
|
int loIndex = (i + 0) * sizeBits;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
int64_t arg1 = arg1Bits |
|
|
(0 - (arg1Bits & (ULL(1) << (sizeBits - 1))));
|
|
uint64_t arg2Bits = bits(FpSrcReg2_uqw, hiIndex, loIndex);
|
|
int64_t arg2 = arg2Bits |
|
|
(0 - (arg2Bits & (ULL(1) << (sizeBits - 1))));
|
|
|
|
uint64_t resBits = 0;
|
|
if (((ext & 0x2) == 0 && arg1 == arg2) ||
|
|
((ext & 0x2) == 0x2 && arg1 > arg2))
|
|
resBits = mask(sizeBits);
|
|
|
|
result = insertBits(result, hiIndex, loIndex, resBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Mcmpf2r(MediaOp):
|
|
code = '''
|
|
union floatInt
|
|
{
|
|
float f;
|
|
uint32_t i;
|
|
};
|
|
union doubleInt
|
|
{
|
|
double d;
|
|
uint64_t i;
|
|
};
|
|
|
|
assert(srcSize == destSize);
|
|
int size = srcSize;
|
|
int sizeBits = size * 8;
|
|
int items = numItems(size);
|
|
uint64_t result = FpDestReg_uqw;
|
|
|
|
for (int i = 0; i < items; i++) {
|
|
int hiIndex = (i + 1) * sizeBits - 1;
|
|
int loIndex = (i + 0) * sizeBits;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, hiIndex, loIndex);
|
|
uint64_t arg2Bits = bits(FpSrcReg2_uqw, hiIndex, loIndex);
|
|
double arg1, arg2;
|
|
|
|
if (size == 4) {
|
|
floatInt fi;
|
|
fi.i = arg1Bits;
|
|
arg1 = fi.f;
|
|
fi.i = arg2Bits;
|
|
arg2 = fi.f;
|
|
} else {
|
|
doubleInt di;
|
|
di.i = arg1Bits;
|
|
arg1 = di.d;
|
|
di.i = arg2Bits;
|
|
arg2 = di.d;
|
|
}
|
|
|
|
uint64_t resBits = 0;
|
|
bool nanop = std::isnan(arg1) || std::isnan(arg2);
|
|
switch (ext & mask(3)) {
|
|
case 0:
|
|
if (arg1 == arg2 && !nanop)
|
|
resBits = mask(sizeBits);
|
|
break;
|
|
case 1:
|
|
if (arg1 < arg2 && !nanop)
|
|
resBits = mask(sizeBits);
|
|
break;
|
|
case 2:
|
|
if (arg1 <= arg2 && !nanop)
|
|
resBits = mask(sizeBits);
|
|
break;
|
|
case 3:
|
|
if (nanop)
|
|
resBits = mask(sizeBits);
|
|
break;
|
|
case 4:
|
|
if (arg1 != arg2 || nanop)
|
|
resBits = mask(sizeBits);
|
|
break;
|
|
case 5:
|
|
if (!(arg1 < arg2) || nanop)
|
|
resBits = mask(sizeBits);
|
|
break;
|
|
case 6:
|
|
if (!(arg1 <= arg2) || nanop)
|
|
resBits = mask(sizeBits);
|
|
break;
|
|
case 7:
|
|
if (!nanop)
|
|
resBits = mask(sizeBits);
|
|
break;
|
|
};
|
|
|
|
result = insertBits(result, hiIndex, loIndex, resBits);
|
|
}
|
|
FpDestReg_uqw = result;
|
|
'''
|
|
|
|
class Mcmpf2rf(MediaOp):
|
|
def __init__(self, src1, src2,\
|
|
size = None, destSize = None, srcSize = None, ext = None):
|
|
super(Mcmpf2rf, self).__init__("InstRegIndex(0)", src1,\
|
|
src2, size, destSize, srcSize, ext)
|
|
code = '''
|
|
union floatInt
|
|
{
|
|
float f;
|
|
uint32_t i;
|
|
};
|
|
union doubleInt
|
|
{
|
|
double d;
|
|
uint64_t i;
|
|
};
|
|
|
|
assert(srcSize == destSize);
|
|
assert(srcSize == 4 || srcSize == 8);
|
|
int size = srcSize;
|
|
int sizeBits = size * 8;
|
|
|
|
double arg1, arg2;
|
|
uint64_t arg1Bits = bits(FpSrcReg1_uqw, sizeBits - 1, 0);
|
|
uint64_t arg2Bits = bits(FpSrcReg2_uqw, sizeBits - 1, 0);
|
|
if (size == 4) {
|
|
floatInt fi;
|
|
fi.i = arg1Bits;
|
|
arg1 = fi.f;
|
|
fi.i = arg2Bits;
|
|
arg2 = fi.f;
|
|
} else {
|
|
doubleInt di;
|
|
di.i = arg1Bits;
|
|
arg1 = di.d;
|
|
di.i = arg2Bits;
|
|
arg2 = di.d;
|
|
}
|
|
|
|
// ZF PF CF
|
|
// Unordered 1 1 1
|
|
// Greater than 0 0 0
|
|
// Less than 0 0 1
|
|
// Equal 1 0 0
|
|
// OF = SF = AF = 0
|
|
ccFlagBits = ccFlagBits & ~(SFBit | AFBit | ZFBit | PFBit);
|
|
cfofBits = cfofBits & ~(OFBit | CFBit);
|
|
|
|
if (std::isnan(arg1) || std::isnan(arg2)) {
|
|
ccFlagBits = ccFlagBits | (ZFBit | PFBit);
|
|
cfofBits = cfofBits | CFBit;
|
|
}
|
|
else if(arg1 < arg2)
|
|
cfofBits = cfofBits | CFBit;
|
|
else if(arg1 == arg2)
|
|
ccFlagBits = ccFlagBits | ZFBit;
|
|
'''
|
|
|
|
class Emms(MediaOp):
|
|
def __init__(self):
|
|
super(Emms, self).__init__('InstRegIndex(MISCREG_FTW)',
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'InstRegIndex(0)', 'InstRegIndex(0)', 2)
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code = 'FTW = 0xFFFF;'
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|
}};
|