9ce632d1f0
dev/baddev.cc:
dev/baddev.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/pcireg.h:
dev/platform.cc:
dev/platform.hh:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
kern/linux/linux.hh:
kern/linux/linux_syscalls.cc:
kern/linux/linux_syscalls.hh:
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
Updated copyright
dev/tsunamireg.h:
Updated copyright and fixed a ULL
--HG--
extra : convert_revision : 4800bd227c7064044ee98169d6a91f74c791956f
128 lines
4.5 KiB
C++
128 lines
4.5 KiB
C++
/*
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* Copyright (c) 2004 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* @file
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* PCI Config space implementation.
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*/
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#ifndef __PCICONFIGALL_HH__
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#define __PCICONFIGALL_HH__
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#include "mem/functional_mem/functional_memory.hh"
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#include "dev/pcireg.h"
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static const uint32_t MAX_PCI_DEV = 32;
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static const uint32_t MAX_PCI_FUNC = 8;
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class PciDev;
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/**
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* PCI Config Space
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* All of PCI config space needs to return -1 on Tsunami, except
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* the devices that exist. This device maps the entire bus config
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* space and passes the requests on to TsunamiPCIDev devices as
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* appropriate.
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*/
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class PciConfigAll : public FunctionalMemory
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{
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private:
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Addr addr;
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static const Addr size = 0xffffff;
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/**
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* Pointers to all the devices that are registered with this
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* particular config space.
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*/
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PciDev* devices[MAX_PCI_DEV][MAX_PCI_FUNC];
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public:
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/**
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* Constructor for PCIConfigAll
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* @param name name of the object
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* @param a base address of the write
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* @param mmu the memory controller
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*/
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PciConfigAll(const std::string &name, Addr a, MemoryController *mmu);
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/**
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* Check if a device exists.
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* @param pcidev PCI device to check
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* @param pcifunc PCI function to check
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* @return true if device exists, false otherwise
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*/
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bool deviceExists(uint32_t pcidev, uint32_t pcifunc)
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{ return devices[pcidev][pcifunc] != NULL ? true : false; }
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/**
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* Registers a device with the config space object.
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* @param pcidev PCI device to register
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* @param pcifunc PCI function to register
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* @param device device to register
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*/
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void registerDevice(uint8_t pcidev, uint8_t pcifunc, PciDev *device)
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{ devices[pcidev][pcifunc] = device; }
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/**
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* Read something in PCI config space. If the device does not exist
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* -1 is returned, if the device does exist its PciDev::ReadConfig (or the
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* virtual function that overrides) it is called.
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* @param req Contains the address of the field to read.
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* @param data Return the field read.
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* @return The fault condition of the access.
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*/
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virtual Fault read(MemReqPtr &req, uint8_t *data);
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/**
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* Write to PCI config spcae. If the device does not exit the simulator
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* panics. If it does it is passed on the PciDev::WriteConfig (or the virtual
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* function that overrides it).
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* @param req Contains the address to write to.
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* @param data The data to write.
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* @return The fault condition of the access.
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*/
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virtual Fault write(MemReqPtr &req, const uint8_t *data);
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/**
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* Serialize this object to the given output stream.
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* @param os The stream to serialize to.
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*/
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virtual void serialize(std::ostream &os);
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/**
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* Reconstruct the state of this object from a checkpoint.
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* @param cp The checkpoint use.
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* @param section The section name of this object
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*/
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virtual void unserialize(Checkpoint *cp, const std::string §ion);
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};
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#endif // __PCICONFIGALL_HH__
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